ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators

Seok Hwan Noh; Wonjun Choi; Min Suk Oh; D. K. Hwang; Kimoon Lee; Seongil Im; Sungjin Jang; Eugene Kim

doi:10.1063/1.2749841

ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators

Seok Hwan Noh, Wonjun Choi, Min Suk Oh, D. K. Hwang, Kimoon Lee, Seongil Im, Sungjin Jang, Eugene Kim

Department of Physics

Research output: Contribution to journal › Article › peer-review

103 Citations (Scopus)

Abstract

The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm²/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDFZTrFE). The retention of the device lasted over 2 h.

Original language	English
Article number	253504
Journal	Applied Physics Letters
Volume	90
Issue number	25
DOIs	https://doi.org/10.1063/1.2749841
Publication status	Published - 2007

Bibliographical note

Funding Information:
The authors acknowledge the financial support from KOSEF (Program Nos. 2002-03177 and R01-2006-000-11277-0), KITECH, and Brain Korea 21 Program.

All Science Journal Classification (ASJC) codes

Physics and Astronomy (miscellaneous)

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10.1063/1.2749841

Cite this

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title = "ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators",

abstract = "The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm2/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDFZTrFE). The retention of the device lasted over 2 h.",

author = "Noh, {Seok Hwan} and Wonjun Choi and Oh, {Min Suk} and Hwang, {D. K.} and Kimoon Lee and Seongil Im and Sungjin Jang and Eugene Kim",

note = "Funding Information: The authors acknowledge the financial support from KOSEF (Program Nos. 2002-03177 and R01-2006-000-11277-0), KITECH, and Brain Korea 21 Program.",

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doi = "10.1063/1.2749841",

language = "English",

volume = "90",

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T1 - ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators

AU - Noh, Seok Hwan

AU - Choi, Wonjun

AU - Oh, Min Suk

AU - Hwang, D. K.

AU - Lee, Kimoon

AU - Im, Seongil

AU - Jang, Sungjin

AU - Kim, Eugene

N1 - Funding Information: The authors acknowledge the financial support from KOSEF (Program Nos. 2002-03177 and R01-2006-000-11277-0), KITECH, and Brain Korea 21 Program.

PY - 2007

Y1 - 2007

N2 - The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm2/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDFZTrFE). The retention of the device lasted over 2 h.

AB - The authors report on the fabrication of a top-gate ZnO thin-film transistor (TFT) with a polymer dielectric/ferroelectric double-layer gate insulator that was formed on patterned ZnO through a sequential spin-casting process of 450-nm-thick poly-4-vinylphenol (PVP) and 200-nm-thick poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]. Compared to the single P(VDF/TrFE) layer, double layer shows remarkably reduced leakage current with the aid of the PVP buffer. TFT with the PVP/P(VDF/TrFE) double layer exhibits a field effect mobility of 0.36 cm2/V and a large memory hysteresis in the transfer characteristics due to the ferroelectric P(VDFZTrFE). The retention of the device lasted over 2 h.

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ZnO-based nonvolatile memory thin-film transistors with polymer dielectric/ferroelectric double gate insulators

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

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