Abstract
NVMe SSD over PCIe is attractive since it provides high throughput and low latency. However, complex internal SSD operations may cause a non-deterministic I/O latency which is one of the most important factors in a storage system. While conventional approaches to enhance I/O latency prediction are based on host systems, this paper proposes a novel SSD-based deterministic latency enhancement scheme. The proposed method exploits the fact that multiple virtual channels can be utilized. For each virtual channel, the proposed method assigns a different priority for data transmission. NVMe SSD analyses its internal latency and dynamically chooses the virtual channels to compensate the latency. The experimental results show that, using a PCIe switch model, the proposed method can save 41.6% of the latency for each transaction layer packet.
Original language | English |
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Title of host publication | Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017 |
Publisher | Association for Computing Machinery, Inc |
ISBN (Electronic) | 9781450351843 |
DOIs | |
Publication status | Published - 2017 Oct 15 |
Event | 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2017 - Seoul, Korea, Republic of Duration: 2017 Oct 15 → 2017 Oct 20 |
Publication series
Name | Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017 |
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Conference
Conference | 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2017 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 17/10/15 → 17/10/20 |
Bibliographical note
Publisher Copyright:© 2017 Association for Computing Machinery.
All Science Journal Classification (ASJC) codes
- Software