TY - GEN
T1 - Wear-leveling scheduler for phase-change RAM main memory for mobile consumer electronics
AU - Park, Sang Hoon
AU - Seo, Hyeokjun
AU - You, Taehee
AU - Kim, Jin Young
AU - Chung, Eui Young
PY - 2014
Y1 - 2014
N2 - Main memory systems based on phase-change random access memory (PRAM) have been actively researched due to low static power consumption, which is adequate to mobile consumer electronics. However, PRAMs require wear-leveling, which incur performance overhead, to compensate their limited life-time. Even though many works have discussed the overhead in terms of write latency, read latency is also affected and the degradation is even severer since PRAM read is faster than write. Consequently, this paper proposes a wear-leveling scheduler that reduces the effect of wear-leveling overhead on read latency. The proposed method which can cooperate with various wear-leveling algorithms enables wear-leveling only when no read request is issued for a period longer than the pre-defined threshold. In spite of simplicity, a PRAM-based memory system equipped with the proposed method achieves 50% shorter read latency without affecting wear-leveling performance.
AB - Main memory systems based on phase-change random access memory (PRAM) have been actively researched due to low static power consumption, which is adequate to mobile consumer electronics. However, PRAMs require wear-leveling, which incur performance overhead, to compensate their limited life-time. Even though many works have discussed the overhead in terms of write latency, read latency is also affected and the degradation is even severer since PRAM read is faster than write. Consequently, this paper proposes a wear-leveling scheduler that reduces the effect of wear-leveling overhead on read latency. The proposed method which can cooperate with various wear-leveling algorithms enables wear-leveling only when no read request is issued for a period longer than the pre-defined threshold. In spite of simplicity, a PRAM-based memory system equipped with the proposed method achieves 50% shorter read latency without affecting wear-leveling performance.
UR - http://www.scopus.com/inward/record.url?scp=84907352703&partnerID=8YFLogxK
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U2 - 10.1109/ISCE.2014.6884311
DO - 10.1109/ISCE.2014.6884311
M3 - Conference contribution
AN - SCOPUS:84907352703
SN - 9781479945924
T3 - Proceedings of the International Symposium on Consumer Electronics, ISCE
BT - ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th IEEE International Symposium on Consumer Electronics, ISCE 2014
Y2 - 22 June 2014 through 25 June 2014
ER -