VLSI architecture design of rake receivers for cdma2000 systems

Seongjoo Lee, Jaseok Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

We propose low-complexity architecture for rake receivers in cdma2000 systems. The hardware cost of rake receivers is significantly increased in cdma2000 systems, because rake receivers should demodulate multi-path signals transmitted through multiple sub-carriers. We, therefore, present a novel architecture which adopts a multifinger structure, arithmetic units shared by multi-fingers, and time-deskew buffers using a pre-combining technique. The results show that the proposed receiver reduces the hardware complexity by about 49.4% compared with a conventional one.

Original languageEnglish
Title of host publicationIEEE Workshop on Signal Processing Systems, SIPS 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages183-188
Number of pages6
ISBN (Electronic)0780375874
DOIs
Publication statusPublished - 2002
Event16th IEEE Workshop on Signal Processing Systems, SIPS 2002 - San Diego, United States
Duration: 2002 Oct 162002 Oct 18

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume2002-January
ISSN (Print)1520-6130

Conference

Conference16th IEEE Workshop on Signal Processing Systems, SIPS 2002
Country/TerritoryUnited States
CitySan Diego
Period02/10/1602/10/18

Bibliographical note

Publisher Copyright:
© 2002 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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