Vertically and laterally self-aligned double-layer of nanocrystals in nanopatterned dielectric layer for nanocrystal floating gate memory device

Quanli Hu, Tae Kwang Eom, Soo Hyun Kim, Hyung Jun Kim, Hyun Ho Lee, Yong Sang Kim, Du Yeol Ryu, Ki Bum Kim, Tae Sik Yoon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The formation of vertically and laterally self-aligned double-layer of CdSe colloidal nanocrystals (NCs) in nanopatterned dielectric layer on Si substrate was demonstrated by repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of Al2O3 layer. A nanopatterned-SiO2/Si substrate was formed by patterning with self-assembled diblock copolymer. After the selective deposition of the 1 st NC layer inside SiO2 nanopattern by dip-coating, an Al2O3 interdielectric layer and the 2nd NC layer in Al2O3 nanopattern were sequentially deposited. The capacitance-voltage measurement of Al-gate/ALD-Al2O 3(25nm)/2nd-CdSe-NCs/ALD-Al2O 3(2nm)/1st-CdSe-NCs/nanopatterned-Si02(15nm)/p- Si substrate structure showed the flatband voltage shift resulting from the charging of NCs.

Original languageEnglish
Title of host publicationLow-Dimensional Nanoscale Electronic and Photonic Devices 4
PublisherElectrochemical Society Inc.
Pages75-82
Number of pages8
Edition9
ISBN (Electronic)9781566778282
ISBN (Print)9781607681786
DOIs
Publication statusPublished - 2010
EventLow-Dimensional Nanoscale Electronic and Photonic Devices 4 - 218th ECS Meeting - Las Vegas, NV, United States
Duration: 2010 Oct 102010 Oct 15

Publication series

NameECS Transactions
Number9
Volume33
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherLow-Dimensional Nanoscale Electronic and Photonic Devices 4 - 218th ECS Meeting
Country/TerritoryUnited States
CityLas Vegas, NV
Period10/10/1010/10/15

All Science Journal Classification (ASJC) codes

  • General Engineering

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