TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure

Kim Youbean; Song Dongsup; Kim Kicheol; Kim Incheol; Kang Sungho

doi:10.1109/ATS.2006.260987

TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure

Kim Youbean, Song Dongsup, Kim Kicheol, Kim Incheol, Kang Sungho

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

Original language	English
Title of host publication	Proceedings of the 15th Asian Test Symposium 2006
Pages	17-22
Number of pages	6
DOIs	https://doi.org/10.1109/ATS.2006.260987
Publication status	Published - 2006
Event	15th Asian Test Symposium 2006 - Fukuoka, Japan Duration: 2006 Nov 20 → 2006 Nov 23

Publication series

Name	Proceedings of the Asian Test Symposium
Volume	2006
ISSN (Print)	1081-7735

Other

Other	15th Asian Test Symposium 2006
Country/Territory	Japan
City	Fukuoka
Period	06/11/20 → 06/11/23

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/ATS.2006.260987

Cite this

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title = "TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure",

abstract = "Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.",

author = "Kim Youbean and Song Dongsup and Kim Kicheol and Kim Incheol and Kang Sungho",

year = "2006",

doi = "10.1109/ATS.2006.260987",

language = "English",

isbn = "0769526284",

series = "Proceedings of the Asian Test Symposium",

pages = "17--22",

booktitle = "Proceedings of the 15th Asian Test Symposium 2006",

note = "15th Asian Test Symposium 2006 ; Conference date: 20-11-2006 Through 23-11-2006",

}

Youbean, K, Dongsup, S, Kicheol, K, Incheol, K & Sungho, K 2006, TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure. in Proceedings of the 15th Asian Test Symposium 2006., 4030735, Proceedings of the Asian Test Symposium, vol. 2006, pp. 17-22, 15th Asian Test Symposium 2006, Fukuoka, Japan, 06/11/20. https://doi.org/10.1109/ATS.2006.260987

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T2 - 15th Asian Test Symposium 2006

AU - Youbean, Kim

AU - Dongsup, Song

AU - Kicheol, Kim

AU - Incheol, Kim

AU - Sungho, Kang

PY - 2006

Y1 - 2006

N2 - Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

AB - Power of scan operation is dominant factor. This paper proposed the structure to reduce scan power totally. The total scan power reduction architecture uses a duplicated transition monitoring window and sub-scan chains. Experimental results show 60% transition reduction, 2∼4% fault coverage improvement, and 25% scan-in and 26% scan-out transition by the TOSCA.

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M3 - Conference contribution

AN - SCOPUS:33947619059

SN - 0769526284

SN - 9780769526287

T3 - Proceedings of the Asian Test Symposium

SP - 17

EP - 22

BT - Proceedings of the 15th Asian Test Symposium 2006

Y2 - 20 November 2006 through 23 November 2006

ER -

TOSCA: Total scan power reduction architecture based on pseudo-random built-in self test structure

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