The impact of gate to drain spacing on hot-carrier degradation in sub-100 nm Ni-Pt salicidation FinFETs

Seung Min Lee; Hi Deok Lee; Injo Ok; Jungwoo Oh

doi:10.1016/j.sse.2015.09.018

The impact of gate to drain spacing on hot-carrier degradation in sub-100 nm Ni-Pt salicidation FinFETs

Seung Min Lee, Hi Deok Lee, Injo Ok, Jungwoo Oh

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

Abstract

The impact of gate-to-drain (GtD) spacing on hot carrier reliability in sub-100 nm Ni-Pt self-aligned silicided FinFETs has been analyzed experimentally. FinFETs with long GtD spaces exhibit severe drain current degradation (ΔI_DS/I_DS), but variations in threshold voltage (ΔV_TH/V_TH) and subthreshold swing (ΔSS/SS) are nearly the same as with short GtD spaces. When gate length (L_G) is downscaled from 1 μm to 40 nm, the degradation between long and short GtD spaces increases from 0.4% to 6.5%. The amount of injected hot electrons into salicide-induced defects in the silicon region accounts for the dominant portion of the difference in the current degradation between short and long GtD spaces. The dependence of hot carrier immunity on GtD spacing has been analyzed by both qualitative and quantitative methods.

Original language	English
Pages (from-to)	167-170
Number of pages	4
Journal	Solid-State Electronics
Volume	114
DOIs	https://doi.org/10.1016/j.sse.2015.09.018
Publication status	Published - 2015 Dec 1

Bibliographical note

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© 2015 Elsevier Ltd. All rights reserved.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1016/j.sse.2015.09.018

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title = "The impact of gate to drain spacing on hot-carrier degradation in sub-100 nm Ni-Pt salicidation FinFETs",

abstract = "The impact of gate-to-drain (GtD) spacing on hot carrier reliability in sub-100 nm Ni-Pt self-aligned silicided FinFETs has been analyzed experimentally. FinFETs with long GtD spaces exhibit severe drain current degradation (ΔIDS/IDS), but variations in threshold voltage (ΔVTH/VTH) and subthreshold swing (ΔSS/SS) are nearly the same as with short GtD spaces. When gate length (LG) is downscaled from 1 μm to 40 nm, the degradation between long and short GtD spaces increases from 0.4% to 6.5%. The amount of injected hot electrons into salicide-induced defects in the silicon region accounts for the dominant portion of the difference in the current degradation between short and long GtD spaces. The dependence of hot carrier immunity on GtD spacing has been analyzed by both qualitative and quantitative methods.",

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AU - Lee, Seung Min

AU - Lee, Hi Deok

AU - Ok, Injo

AU - Oh, Jungwoo

PY - 2015/12/1

Y1 - 2015/12/1

N2 - The impact of gate-to-drain (GtD) spacing on hot carrier reliability in sub-100 nm Ni-Pt self-aligned silicided FinFETs has been analyzed experimentally. FinFETs with long GtD spaces exhibit severe drain current degradation (ΔIDS/IDS), but variations in threshold voltage (ΔVTH/VTH) and subthreshold swing (ΔSS/SS) are nearly the same as with short GtD spaces. When gate length (LG) is downscaled from 1 μm to 40 nm, the degradation between long and short GtD spaces increases from 0.4% to 6.5%. The amount of injected hot electrons into salicide-induced defects in the silicon region accounts for the dominant portion of the difference in the current degradation between short and long GtD spaces. The dependence of hot carrier immunity on GtD spacing has been analyzed by both qualitative and quantitative methods.

AB - The impact of gate-to-drain (GtD) spacing on hot carrier reliability in sub-100 nm Ni-Pt self-aligned silicided FinFETs has been analyzed experimentally. FinFETs with long GtD spaces exhibit severe drain current degradation (ΔIDS/IDS), but variations in threshold voltage (ΔVTH/VTH) and subthreshold swing (ΔSS/SS) are nearly the same as with short GtD spaces. When gate length (LG) is downscaled from 1 μm to 40 nm, the degradation between long and short GtD spaces increases from 0.4% to 6.5%. The amount of injected hot electrons into salicide-induced defects in the silicon region accounts for the dominant portion of the difference in the current degradation between short and long GtD spaces. The dependence of hot carrier immunity on GtD spacing has been analyzed by both qualitative and quantitative methods.

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The impact of gate to drain spacing on hot-carrier degradation in sub-100 nm Ni-Pt salicidation FinFETs

Abstract

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