The fabrication of the p-type ultra low temperature TFT under 200°C

Hyuck Lim; Kyung Bae Park; Huaxlang Yin; Wenxu Xianyu; Jang Yaon Kwon; Xiaoxin Zhang; Hans S. Cho; Jong Man Kim; Do Young Kim; Ji Sim Jung; Takashi Noguchi

The fabrication of the p-type ultra low temperature TFT under 200°C

Hyuck Lim, Kyung Bae Park, Huaxlang Yin, Wenxu Xianyu, Jang Yaon Kwon, Xiaoxin Zhang, Hans S. Cho, Jong Man Kim, Do Young Kim, Ji Sim Jung, Takashi Noguchi

School of Integrated Technology

Research output: Contribution to conference › Paper › peer-review

Abstract

We studied the p-channel (p-ch.) poly silicon (Si) thin film transistor (TFT) using ultra low temperature processes below 200°C. By performing the low temperature thermal annealing after obtaining TFT, the device performances, such as the mobility of 64 cm cm²/Vs, and the sub-threshold slope (S.S) of 0.74 Vldec., improved drastically. The p-ch. circuits or complementary MOS (CMOS) design on plastic is expected for future advanced flexible flat panel display (FPD).

Original language	English
Pages	1159-1161
Number of pages	3
Publication status	Published - 2005
Event	IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005 - Takamatsu, Japan Duration: 2005 Dec 6 → 2005 Dec 9

Other

Other	IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005
Country/Territory	Japan
City	Takamatsu
Period	05/12/6 → 05/12/9

All Science Journal Classification (ASJC) codes

Engineering(all)

Cite this

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title = "The fabrication of the p-type ultra low temperature TFT under 200°C",

abstract = "We studied the p-channel (p-ch.) poly silicon (Si) thin film transistor (TFT) using ultra low temperature processes below 200°C. By performing the low temperature thermal annealing after obtaining TFT, the device performances, such as the mobility of 64 cm cm2/Vs, and the sub-threshold slope (S.S) of 0.74 Vldec., improved drastically. The p-ch. circuits or complementary MOS (CMOS) design on plastic is expected for future advanced flexible flat panel display (FPD).",

author = "Hyuck Lim and Park, {Kyung Bae} and Huaxlang Yin and Wenxu Xianyu and Kwon, {Jang Yaon} and Xiaoxin Zhang and Cho, {Hans S.} and Kim, {Jong Man} and Kim, {Do Young} and Jung, {Ji Sim} and Takashi Noguchi",

year = "2005",

language = "English",

pages = "1159--1161",

note = "IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005 ; Conference date: 06-12-2005 Through 09-12-2005",

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TY - CONF

T1 - The fabrication of the p-type ultra low temperature TFT under 200°C

AU - Lim, Hyuck

AU - Park, Kyung Bae

AU - Yin, Huaxlang

AU - Xianyu, Wenxu

AU - Kwon, Jang Yaon

AU - Zhang, Xiaoxin

AU - Cho, Hans S.

AU - Kim, Jong Man

AU - Kim, Do Young

AU - Jung, Ji Sim

AU - Noguchi, Takashi

PY - 2005

Y1 - 2005

N2 - We studied the p-channel (p-ch.) poly silicon (Si) thin film transistor (TFT) using ultra low temperature processes below 200°C. By performing the low temperature thermal annealing after obtaining TFT, the device performances, such as the mobility of 64 cm cm2/Vs, and the sub-threshold slope (S.S) of 0.74 Vldec., improved drastically. The p-ch. circuits or complementary MOS (CMOS) design on plastic is expected for future advanced flexible flat panel display (FPD).

AB - We studied the p-channel (p-ch.) poly silicon (Si) thin film transistor (TFT) using ultra low temperature processes below 200°C. By performing the low temperature thermal annealing after obtaining TFT, the device performances, such as the mobility of 64 cm cm2/Vs, and the sub-threshold slope (S.S) of 0.74 Vldec., improved drastically. The p-ch. circuits or complementary MOS (CMOS) design on plastic is expected for future advanced flexible flat panel display (FPD).

UR - http://www.scopus.com/inward/record.url?scp=33644599351&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33644599351&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:33644599351

SP - 1159

EP - 1161

T2 - IDW/AD'05 - 12th International Display Workshops in Conjunction with Asia Display 2005

Y2 - 6 December 2005 through 9 December 2005

ER -

The fabrication of the p-type ultra low temperature TFT under 200°C

Abstract

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All Science Journal Classification (ASJC) codes

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