The effect of gate length on channel strain of recessed source/drain Si 1-xC x

Dae Hong Ko, Sun Wook Kim, Dae Seop Byeon, Sangmo Koo, Mijin Jung, Saurabh Chopra, Yihwan Kim, Hoo Jeong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In this study, we investigated the effects of the dimensional scaling of n-channel field-effect transistors on the channel strain. We employed nanobeam diffraction to independently determine the effects of scaling of two major transistor dimensions (gate and source/ drain length) on the channel strain. Both these parameters influenced the channel strain, but in the opposite directions: the channel strain increased with the gate length decreasing, while declining with the reduction of the source/ drain length. Using device simulation, we also considered the combined effects of all the main scaling factors, disclosing that the strain decreased with the reduction of the dimensions.

Original languageEnglish
Title of host publication2012 International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Proceedings
Pages160-161
Number of pages2
DOIs
Publication statusPublished - 2012
Event6th International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Berkeley, CA, United States
Duration: 2012 Jun 42012 Jun 6

Publication series

Name2012 International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Proceedings

Other

Other6th International Silicon-Germanium Technology and Device Meeting, ISTDM 2012
Country/TerritoryUnited States
CityBerkeley, CA
Period12/6/412/6/6

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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