Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?)

Ilseok Suh; Hong Sik Kim; Sungho Kang; Gunhee Han

doi:10.1109/APASIC.2000.896962

Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?)

Ilseok Suh, Hong Sik Kim, Sungho Kang, Gunhee Han

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The increase in integrity of the recent VLSI technology has enabled a trend of small and portable applications. These portable applications, like notebook computers and cellular phones, need the high-performance and low-power consumption. In most products the major power consuming elements are the memories. So low power memory technology has been developed. But the test features have not been studied sufficiently. This paper provides a test methodology useful for low power SRAM's. Also simulation results for the Driving Source Line technology show how useful the Iddq test is.

Original language	English
Title of host publication	Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	277-280
Number of pages	4
ISBN (Electronic)	0780364708, 9780780364707
DOIs	https://doi.org/10.1109/APASIC.2000.896962
Publication status	Published - 2000
Event	2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000 - Cheju, Korea, Republic of Duration: 2000 Aug 28 → 2000 Aug 30

Publication series

Name	Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000

Other

Other	2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000
Country/Territory	Korea, Republic of
City	Cheju
Period	00/8/28 → 00/8/30

Bibliographical note

Publisher Copyright:
© 2000 IEEE.

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/APASIC.2000.896962

Cite this

Suh, I., Kim, H. S., Kang, S., & Han, G. (2000). Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?). In Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000 (pp. 277-280). Article 896962 (Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APASIC.2000.896962

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abstract = "The increase in integrity of the recent VLSI technology has enabled a trend of small and portable applications. These portable applications, like notebook computers and cellular phones, need the high-performance and low-power consumption. In most products the major power consuming elements are the memories. So low power memory technology has been developed. But the test features have not been studied sufficiently. This paper provides a test methodology useful for low power SRAM's. Also simulation results for the Driving Source Line technology show how useful the Iddq test is.",

author = "Ilseok Suh and Kim, {Hong Sik} and Sungho Kang and Gunhee Han",

note = "Publisher Copyright: {\textcopyright} 2000 IEEE.; 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000 ; Conference date: 28-08-2000 Through 30-08-2000",

year = "2000",

doi = "10.1109/APASIC.2000.896962",

language = "English",

series = "Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000",

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Suh, I, Kim, HS, Kang, S & Han, G 2000, Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?). in Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000., 896962, Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000, Institute of Electrical and Electronics Engineers Inc., pp. 277-280, 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000, Cheju, Korea, Republic of, 00/8/28. https://doi.org/10.1109/APASIC.2000.896962

Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?). / Suh, Ilseok; Kim, Hong Sik; Kang, Sungho et al.
Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000. Institute of Electrical and Electronics Engineers Inc., 2000. p. 277-280 896962 (Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - The increase in integrity of the recent VLSI technology has enabled a trend of small and portable applications. These portable applications, like notebook computers and cellular phones, need the high-performance and low-power consumption. In most products the major power consuming elements are the memories. So low power memory technology has been developed. But the test features have not been studied sufficiently. This paper provides a test methodology useful for low power SRAM's. Also simulation results for the Driving Source Line technology show how useful the Iddq test is.

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Suh I, Kim HS, Kang S , Han G. Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?). In Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000. Institute of Electrical and Electronics Engineers Inc. 2000. p. 277-280. 896962. (Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000). doi: 10.1109/APASIC.2000.896962

Test methodology for low power SRAM's (Is Iddq test useful for low power SRAM's?)

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