Test cost reduction for X-value elimination by scan slice correlation analysis

Hyunsu Chae, Joon Sung Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution


X-values in test output responses corrupt an output response compaction and can cause a fault coverage loss. X-Masking and XCanceling MISR methods have been suggested to eliminate Xvalues, however, there are control data volume and test time overhead issues. These issues become significant as the complexity and the density of the circuits increase. This paper proposes a method to eliminate X's by applying a scan slice granularity Xvalue correlation analysis. The proposed method exploits scan slice correlation analysis, determines unique control data for the scan slice groups sharing the same control data, and applies them for each scan slice. Hence, the volume of control data can be significantly reduced. The simulation results demonstrate that the proposed method achieves greater control data and test time reduction compared to the conventional methods, without loss of fault coverage.

Original languageEnglish
Title of host publicationProceedings of the 55th Annual Design Automation Conference, DAC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781450357005
Publication statusPublished - 2018 Jun 24
Event55th Annual Design Automation Conference, DAC 2018 - San Francisco, United States
Duration: 2018 Jun 242018 Jun 29

Publication series

NameProceedings - Design Automation Conference
VolumePart F137710
ISSN (Print)0738-100X


Conference55th Annual Design Automation Conference, DAC 2018
Country/TerritoryUnited States
CitySan Francisco

Bibliographical note

Funding Information:
This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2015R1D1A1A01058856) and in part by the MOTIE (Ministry of Trade, Industry & Energy (10080594) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device.

Publisher Copyright:
© 2018 Association for Computing Machinery.

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modelling and Simulation


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