Sub-60nm Si tunnel field effect transistors with Ion >100 μA/μm

Wei Yip Loh; Kanghoon Jeon; Chang Yong Kang; Jungwoo Oh; Pratik Patel; Casey Smith; Joel Barnett; Chanro Park; Tsu Jae King Liu; Hsing Huang Tseng; Prashant Majhi; Raj Jammy; Chenming Hu

doi:10.1109/ESSDERC.2010.5618418

Sub-60nm Si tunnel field effect transistors with I_on >100 μA/μm

Wei Yip Loh, Kanghoon Jeon, Chang Yong Kang, Jungwoo Oh, Pratik Patel, Casey Smith, Joel Barnett, Chanro Park, Tsu Jae King Liu, Hsing Huang Tseng, Prashant Majhi, Raj Jammy, Chenming Hu

School of Integrated Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

20 Citations (Scopus)

Abstract

Si-tunneling field effect transistors (TFETs) with a record I_on >100 μA/μm and high I_on/I_of_f ratio (> 10⁵) at V_ds=1V are reported. Using an optimal spike and millisec flash anneal coupled with an engineered source-gate overlap through a gate-last process, Si TFET_shave been demonstrated with 10 to 1000 times greater current than previously reported. The devices exhibit negative differential resistance and temperature dependencies consistent with band-to-band tunneling and current characteristics in excellent agreement with 2D TCAD simulations.

Original language	English
Title of host publication	2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010
Pages	162-165
Number of pages	4
DOIs	https://doi.org/10.1109/ESSDERC.2010.5618418
Publication status	Published - 2010
Event	2010 European Solid State Device Research Conference, ESSDERC 2010 - Sevilla, Spain Duration: 2010 Sept 14 → 2010 Sept 16

Publication series

Name	2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010

Other

Other	2010 European Solid State Device Research Conference, ESSDERC 2010
Country/Territory	Spain
City	Sevilla
Period	10/9/14 → 10/9/16

All Science Journal Classification (ASJC) codes

Condensed Matter Physics

Access to Document

10.1109/ESSDERC.2010.5618418

Cite this

Loh, W. Y., Jeon, K., Kang, C. Y., Oh, J., Patel, P., Smith, C., Barnett, J., Park, C., Liu, T. J. K., Tseng, H. H., Majhi, P., Jammy, R., & Hu, C. (2010). Sub-60nm Si tunnel field effect transistors with I_on >100 μA/μm. In 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010 (pp. 162-165). [5618418] (2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010). https://doi.org/10.1109/ESSDERC.2010.5618418

@inproceedings{1319deed4d064cdea886f2d4d0a607e0,

title = "Sub-60nm Si tunnel field effect transistors with Ion >100 μA/μm",

abstract = "Si-tunneling field effect transistors (TFETs) with a record Ion >100 μA/μm and high Ion/Ioff ratio (> 105) at Vds=1V are reported. Using an optimal spike and millisec flash anneal coupled with an engineered source-gate overlap through a gate-last process, Si TFETshave been demonstrated with 10 to 1000 times greater current than previously reported. The devices exhibit negative differential resistance and temperature dependencies consistent with band-to-band tunneling and current characteristics in excellent agreement with 2D TCAD simulations.",

author = "Loh, {Wei Yip} and Kanghoon Jeon and Kang, {Chang Yong} and Jungwoo Oh and Pratik Patel and Casey Smith and Joel Barnett and Chanro Park and Liu, {Tsu Jae King} and Tseng, {Hsing Huang} and Prashant Majhi and Raj Jammy and Chenming Hu",

year = "2010",

doi = "10.1109/ESSDERC.2010.5618418",

language = "English",

isbn = "9781424466610",

series = "2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010",

pages = "162--165",

booktitle = "2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010",

note = "2010 European Solid State Device Research Conference, ESSDERC 2010 ; Conference date: 14-09-2010 Through 16-09-2010",

}

Loh, WY, Jeon, K, Kang, CY, Oh, J, Patel, P, Smith, C, Barnett, J, Park, C, Liu, TJK, Tseng, HH, Majhi, P, Jammy, R & Hu, C 2010, Sub-60nm Si tunnel field effect transistors with I_on >100 μA/μm. in 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010., 5618418, 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010, pp. 162-165, 2010 European Solid State Device Research Conference, ESSDERC 2010, Sevilla, Spain, 10/9/14. https://doi.org/10.1109/ESSDERC.2010.5618418

Sub-60nm Si tunnel field effect transistors with I_on >100 μA/μm. / Loh, Wei Yip; Jeon, Kanghoon; Kang, Chang Yong et al.
2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010. 2010. p. 162-165 5618418 (2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Sub-60nm Si tunnel field effect transistors with Ion >100 μA/μm

AU - Loh, Wei Yip

AU - Jeon, Kanghoon

AU - Kang, Chang Yong

AU - Oh, Jungwoo

AU - Patel, Pratik

AU - Smith, Casey

AU - Barnett, Joel

AU - Park, Chanro

AU - Liu, Tsu Jae King

AU - Tseng, Hsing Huang

AU - Majhi, Prashant

AU - Jammy, Raj

AU - Hu, Chenming

PY - 2010

Y1 - 2010

N2 - Si-tunneling field effect transistors (TFETs) with a record Ion >100 μA/μm and high Ion/Ioff ratio (> 105) at Vds=1V are reported. Using an optimal spike and millisec flash anneal coupled with an engineered source-gate overlap through a gate-last process, Si TFETshave been demonstrated with 10 to 1000 times greater current than previously reported. The devices exhibit negative differential resistance and temperature dependencies consistent with band-to-band tunneling and current characteristics in excellent agreement with 2D TCAD simulations.

AB - Si-tunneling field effect transistors (TFETs) with a record Ion >100 μA/μm and high Ion/Ioff ratio (> 105) at Vds=1V are reported. Using an optimal spike and millisec flash anneal coupled with an engineered source-gate overlap through a gate-last process, Si TFETshave been demonstrated with 10 to 1000 times greater current than previously reported. The devices exhibit negative differential resistance and temperature dependencies consistent with band-to-band tunneling and current characteristics in excellent agreement with 2D TCAD simulations.

UR - http://www.scopus.com/inward/record.url?scp=78649949927&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78649949927&partnerID=8YFLogxK

U2 - 10.1109/ESSDERC.2010.5618418

DO - 10.1109/ESSDERC.2010.5618418

M3 - Conference contribution

AN - SCOPUS:78649949927

SN - 9781424466610

T3 - 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010

SP - 162

EP - 165

BT - 2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010

T2 - 2010 European Solid State Device Research Conference, ESSDERC 2010

Y2 - 14 September 2010 through 16 September 2010

ER -