TY - GEN
T1 - Single metal gate with dual work functions for FD-SOI and UTB double gate technologies
AU - Pham, Daniel
AU - Luan, Hongfa
AU - Mathur, Kaveri
AU - Sassman, Barry
AU - Nguyen, Billy
AU - Brown, George
AU - Yang, Ji Woon
AU - Oh, Jungwoo
AU - Zeitzoff, Peter
AU - Larson, Larry
PY - 2006/1/1
Y1 - 2006/1/1
N2 - In this paper, we demonstrate an integratable single metal gate (TiSiN) on HfSixOy, with dual work functions (4.44eV and 4.83eV), achieved by varying the metal thickness. These structures may be used for FD-SOI and double gate ultra-thin body devices. Close to symmetric Vt is achieved: 0.32V and -0.37V for long channel FD-SOI nMOS and pMOS devices, respectively. The device shows good sub-threshold slope values, as low as 62mV/dec and 75mV/dec for 1μm and 0.2μm devices, respectively.
AB - In this paper, we demonstrate an integratable single metal gate (TiSiN) on HfSixOy, with dual work functions (4.44eV and 4.83eV), achieved by varying the metal thickness. These structures may be used for FD-SOI and double gate ultra-thin body devices. Close to symmetric Vt is achieved: 0.32V and -0.37V for long channel FD-SOI nMOS and pMOS devices, respectively. The device shows good sub-threshold slope values, as low as 62mV/dec and 75mV/dec for 1μm and 0.2μm devices, respectively.
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U2 - 10.1109/SOI.2006.284414
DO - 10.1109/SOI.2006.284414
M3 - Conference contribution
SN - 1424402905
SN - 9781424402908
T3 - Proceedings - IEEE International SOI Conference
SP - 25
EP - 26
BT - 2006 IEEE international SOI Conference Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2006 IEEE International Silicon on Insulator Conference, SOI
Y2 - 2 October 2006 through 5 October 2006
ER -