Selective incorporation of colloidal nanocrystals in nanopatterned SiO ₂ layer for nanocrystal memory device

CdSe colloidal nanocrystals with a size of ∼5 nm were selectively incorporated in SiO₂ nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition- Al₂ O₃ (27 nm) /CdSe (5 nm)/patterned SiO₂ (25 nm) /p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.