Abstract
In this paper, we describe the design and implementation of code division multiple access (CDMA) base station demodulator (CBD) ASIC for the use in IS95-based CDMA mobile communication system. We propose a novel design method for the noncoherent OQPSK PN correlator, fast Hadamard transformer (FHT), lock detector, and time tracking loop, which are the main functional blocks of the demodulator. We also present the implementation environment for the design and verification of demodulator ASIC. The chip has been designed using cell-based design methodology and fabricated by double-metal 0.8-μm CMOS technology. The die of the chip measures 8.1 × 8.3 mm and it contain approximately 76,000 logic gates and 3,000 bits of static RAM.
| Original language | English |
|---|---|
| Pages (from-to) | 276-279 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 4 |
| Publication status | Published - 1996 |
| Event | Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA Duration: 1996 May 12 → 1996 May 15 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering