Abstract
The measurement of static test parameters for an analog-todigital converter (ADC) requires a large volume of test data, especially for a high-resolution ADC. This paper proposes a reduced-code test method for pipelined ADCs that does not compromise test accuracy. The proposed method calculates fault information at each stage by using sub-histograms. The simulation results based on 12-bit pipelined ADCs show a maximum integral nonlinearity error of 0.590 LSB with only 3.92% of the codes required for the conventional histogram-based method.
Original language | English |
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Article number | 20150417 |
Pages (from-to) | 1-10 |
Number of pages | 10 |
Journal | ieice electronics express |
Volume | 12 |
Issue number | 12 |
DOIs | |
Publication status | Published - 2015 Jun 25 |
Bibliographical note
Publisher Copyright:© IEICE 2015.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering