In this paper, a pulsed pMOS sense amplifier for single-ended static random access memory (SRAM) at low supply voltage is proposed. Domino logic for single-ended SRAM such as 8T SRAM has a large read delay because a large read bitline swing is required. To improve read delay, previously proposed pseudo nMOS based sense amplifier was proposed. However, it has a large static current, which causes a large energy consumption. With 22-nm FinFET technology, the proposed pulsed pMOS sense amplifier improves read delay by about 80% compared with conventional domino logic and reduces energy consumption by 40% compared with previously proposed pseudo nMOS based sense amplifier.
|Title of host publication||International Conference on Electronics, Information and Communication, ICEIC 2018|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||4|
|Publication status||Published - 2018 Apr 2|
|Event||17th International Conference on Electronics, Information and Communication, ICEIC 2018 - Honolulu, United States|
Duration: 2018 Jan 24 → 2018 Jan 27
|Name||International Conference on Electronics, Information and Communication, ICEIC 2018|
|Other||17th International Conference on Electronics, Information and Communication, ICEIC 2018|
|Period||18/1/24 → 18/1/27|
Bibliographical noteFunding Information:
This work was supported by the IT R&D program of MOTIE/KEIT. [10052716, Design technology development of ultra-low voltage operating circuit and IP for smart sensor SoC].
© 2018 Institute of Electronics and Information Engineers.
All Science Journal Classification (ASJC) codes
- Information Systems
- Computer Networks and Communications
- Computer Science Applications
- Signal Processing
- Electrical and Electronic Engineering