Power-Delay Area-Efficient Processing-In-Memory Based on Nanocrystalline Hafnia Ferroelectric Field-Effect Transistors

Giuk Kim, Dong Han Ko, Taeho Kim, Sangho Lee, Minhyun Jung, Young Kyu Lee, Sehee Lim, Minyoung Jo, Taehyong Eom, Hunbeom Shin, Yeongseok Jeong, Seongook Jung, Sanghun Jeon

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)


Ferroelectric field-effect transistors (FeFETs) have attracted enormous attention for low-power and high-density nonvolatile memory devices in processing-in-memory (PIM). However, their small memory window (MW) and limited endurance severely degrade the area efficiency and reliability of PIM devices. Herein, we overcome such challenges using key approaches covering from the material to the device and array architecture. High ferroelectricity was successfully demonstrated considering the thermodynamics and kinetics, even in a relatively thick (≥30 nm) ferroelectric material that was unexplored so far. Moreover, we employed a metal-ferroelectric-metal-insulator-semiconductor architecture that enabled desirable voltage division between the ferroelectric and the metal-oxide-semiconductor FET, leading to a large MW (∼11 V), fast operation speed (<20 ns), and high endurance (∼1011 cycles) characteristics. Subsequently, reliable and energy-efficient multiply-and-accumulation (MAC) operations were verified using a fabricated FeFET-PIM array. Furthermore, a system-level simulation demonstrated the high energy efficiency of the FeFET-PIM array, which was attributed to charge-domain computing. Finally, the proposed signed weight MAC computation achieved high accuracy on the CIFAR-10 dataset using the VGG-8 network.

Original languageEnglish
JournalACS Applied Materials and Interfaces
Publication statusAccepted/In press - 2022

Bibliographical note

Publisher Copyright:
© 2022 American Chemical Society.

All Science Journal Classification (ASJC) codes

  • General Materials Science


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