Performance of an input-queued ATM switch with even/odd switching planes

J. W. Son; H. T. Lee; Y. Y. Oh; J. Y. Lee; S. B. Lee

doi:10.1049/el:19970837

Performance of an input-queued ATM switch with even/odd switching planes

J. W. Son, H. T. Lee, Y. Y. Oh, J. Y. Lee, S. B. Lee

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

A switch architecture is proposed for alleviating the HOL blocking by employing even/odd dual FIFO queues at each input and even/odd dual switching planes dedicated to each even/odd queue. Under random traffic, it gives 76.4% throughput without output expansion and 100% with output expansion r = 2, with the same amount of crosspoints as for the ordinary output expansion scheme.

Original language	English
Pages (from-to)	1192-1193
Number of pages	2
Journal	Electronics Letters
Volume	33
Issue number	14
DOIs	https://doi.org/10.1049/el:19970837
Publication status	Published - 1997 Jul 3

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1049/el:19970837

Cite this

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abstract = "A switch architecture is proposed for alleviating the HOL blocking by employing even/odd dual FIFO queues at each input and even/odd dual switching planes dedicated to each even/odd queue. Under random traffic, it gives 76.4% throughput without output expansion and 100% with output expansion r = 2, with the same amount of crosspoints as for the ordinary output expansion scheme.",

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AU - Lee, S. B.

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Performance of an input-queued ATM switch with even/odd switching planes

Abstract

All Science Journal Classification (ASJC) codes

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