TY - JOUR
T1 - Optimized Memory-Disk Integrated System with DRAM and Nonvolatile Memory
AU - Yoon, Su Kyung
AU - Youn, Young Sun
AU - Nam, Sang Jae
AU - Son, Min Ho
AU - Kim, Shin Dug
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/4/1
Y1 - 2016/4/1
N2 - New nonvolatile memory devices can overcome the high-energy consumption, volatility, and density scaling limit of dynamic RAM (DRAM). With these advantages, next-generation nonvolatile memory devices can use both working memory and persistent storage simultaneously. In this study, we horizontally arrange DRAM, phase change memory (PCM), and flash memories as a single compound layer of working and storage space for a memory-disk integrated system (MDIS). The MDIS architecture consists of a static data buffer, DRAM/PCM/Flash hybrid array, and its associated MDIS management module. The static data buffer is placed between the last-level cache and DRAM/PCM/Flash hybrid array to reduce the performance gap. In the DRAM/PCM/Flash hybrid array, DRAM space and a portion of PCM space are used for dynamic data, and the remaining portion of PCM space and flash memory are used for static data including program text and data segments. Based on our simulation results, dynamic access latency of a dynamic area with 128 MB DRAM of space is faster than the MDIS with a PCM-only array model by approximately 5.5 times. Furthermore, the results show that the total execution time of our proposed model with 128-MB DRAM space improves speed by 4.3 times compared to conventional memory-storage system, respectively.
AB - New nonvolatile memory devices can overcome the high-energy consumption, volatility, and density scaling limit of dynamic RAM (DRAM). With these advantages, next-generation nonvolatile memory devices can use both working memory and persistent storage simultaneously. In this study, we horizontally arrange DRAM, phase change memory (PCM), and flash memories as a single compound layer of working and storage space for a memory-disk integrated system (MDIS). The MDIS architecture consists of a static data buffer, DRAM/PCM/Flash hybrid array, and its associated MDIS management module. The static data buffer is placed between the last-level cache and DRAM/PCM/Flash hybrid array to reduce the performance gap. In the DRAM/PCM/Flash hybrid array, DRAM space and a portion of PCM space are used for dynamic data, and the remaining portion of PCM space and flash memory are used for static data including program text and data segments. Based on our simulation results, dynamic access latency of a dynamic area with 128 MB DRAM of space is faster than the MDIS with a PCM-only array model by approximately 5.5 times. Furthermore, the results show that the total execution time of our proposed model with 128-MB DRAM space improves speed by 4.3 times compared to conventional memory-storage system, respectively.
KW - Computer system and organization
KW - emerging technologies
KW - mass storage
KW - memory control and access
KW - memory-storage system
KW - phase change memory
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U2 - 10.1109/TMSCS.2016.2538229
DO - 10.1109/TMSCS.2016.2538229
M3 - Article
AN - SCOPUS:84980021880
SN - 2332-7766
VL - 2
SP - 83
EP - 93
JO - IEEE Transactions on Multi-Scale Computing Systems
JF - IEEE Transactions on Multi-Scale Computing Systems
IS - 2
M1 - 7425254
ER -