Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate

Min Ho Kang; Se Kyung Oh; Hong Sik Shin; Jung Ho Yoo; Ga Won Lee; Jin Suk Wang; Jung Woo Oh; Prashant Majhi; Raj Jammy; Hi Deok Lee

doi:10.1109/SNW.2010.5562558

Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate

Min Ho Kang, Se Kyung Oh, Hong Sik Shin, Jung Ho Yoo, Ga Won Lee, Jin Suk Wang, Jung Woo Oh, Prashant Majhi, Raj Jammy, Hi Deok Lee

School of Integrated Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

Co-sputtering of Ni and Pt was proposed for thermal stable Ge MOSFETs on a Ge-on-Si substrate. The thermal stability of Ni germanide was considerably improved compared to the pure Ni germanide by the co-sputtering of Pt along with Ni, because Pt atoms distributed uniformly in the Ni germanide layer, which suppressed the agglomeration of Ni germanide. Therefore, the proposed Ni-Pt co-sputtering method is promising for high performance Ge MOSFET applications.

Original language	English
Title of host publication	2010 Silicon Nanoelectronics Workshop, SNW 2010
DOIs	https://doi.org/10.1109/SNW.2010.5562558
Publication status	Published - 2010
Event	2010 15th Silicon Nanoelectronics Workshop, SNW 2010 - Honolulu, HI, United States Duration: 2010 Jun 13 → 2010 Jun 14

Publication series

Name	2010 Silicon Nanoelectronics Workshop, SNW 2010

Other

Other	2010 15th Silicon Nanoelectronics Workshop, SNW 2010
Country/Territory	United States
City	Honolulu, HI
Period	10/6/13 → 10/6/14

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/SNW.2010.5562558

Cite this

Kang, M. H., Oh, S. K., Shin, H. S., Yoo, J. H., Lee, G. W., Wang, J. S., Woo Oh, J., Majhi, P., Jammy, R., & Lee, H. D. (2010). Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate. In 2010 Silicon Nanoelectronics Workshop, SNW 2010 [5562558] (2010 Silicon Nanoelectronics Workshop, SNW 2010). https://doi.org/10.1109/SNW.2010.5562558

@inproceedings{95dbd3806632486aa59d2df3e6ee9501,

title = "Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate",

abstract = "Co-sputtering of Ni and Pt was proposed for thermal stable Ge MOSFETs on a Ge-on-Si substrate. The thermal stability of Ni germanide was considerably improved compared to the pure Ni germanide by the co-sputtering of Pt along with Ni, because Pt atoms distributed uniformly in the Ni germanide layer, which suppressed the agglomeration of Ni germanide. Therefore, the proposed Ni-Pt co-sputtering method is promising for high performance Ge MOSFET applications.",

author = "Kang, {Min Ho} and Oh, {Se Kyung} and Shin, {Hong Sik} and Yoo, {Jung Ho} and Lee, {Ga Won} and Wang, {Jin Suk} and {Woo Oh}, Jung and Prashant Majhi and Raj Jammy and Lee, {Hi Deok}",

year = "2010",

doi = "10.1109/SNW.2010.5562558",

language = "English",

isbn = "9781424477272",

series = "2010 Silicon Nanoelectronics Workshop, SNW 2010",

booktitle = "2010 Silicon Nanoelectronics Workshop, SNW 2010",

note = "2010 15th Silicon Nanoelectronics Workshop, SNW 2010 ; Conference date: 13-06-2010 Through 14-06-2010",

}

Kang, MH, Oh, SK, Shin, HS, Yoo, JH, Lee, GW, Wang, JS, Woo Oh, J, Majhi, P, Jammy, R & Lee, HD 2010, Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate. in 2010 Silicon Nanoelectronics Workshop, SNW 2010., 5562558, 2010 Silicon Nanoelectronics Workshop, SNW 2010, 2010 15th Silicon Nanoelectronics Workshop, SNW 2010, Honolulu, HI, United States, 10/6/13. https://doi.org/10.1109/SNW.2010.5562558

Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate. / Kang, Min Ho; Oh, Se Kyung; Shin, Hong Sik et al.
2010 Silicon Nanoelectronics Workshop, SNW 2010. 2010. 5562558 (2010 Silicon Nanoelectronics Workshop, SNW 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate

AU - Kang, Min Ho

AU - Oh, Se Kyung

AU - Shin, Hong Sik

AU - Yoo, Jung Ho

AU - Lee, Ga Won

AU - Wang, Jin Suk

AU - Woo Oh, Jung

AU - Majhi, Prashant

AU - Jammy, Raj

AU - Lee, Hi Deok

PY - 2010

Y1 - 2010

N2 - Co-sputtering of Ni and Pt was proposed for thermal stable Ge MOSFETs on a Ge-on-Si substrate. The thermal stability of Ni germanide was considerably improved compared to the pure Ni germanide by the co-sputtering of Pt along with Ni, because Pt atoms distributed uniformly in the Ni germanide layer, which suppressed the agglomeration of Ni germanide. Therefore, the proposed Ni-Pt co-sputtering method is promising for high performance Ge MOSFET applications.

AB - Co-sputtering of Ni and Pt was proposed for thermal stable Ge MOSFETs on a Ge-on-Si substrate. The thermal stability of Ni germanide was considerably improved compared to the pure Ni germanide by the co-sputtering of Pt along with Ni, because Pt atoms distributed uniformly in the Ni germanide layer, which suppressed the agglomeration of Ni germanide. Therefore, the proposed Ni-Pt co-sputtering method is promising for high performance Ge MOSFET applications.

UR - http://www.scopus.com/inward/record.url?scp=77958022757&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77958022757&partnerID=8YFLogxK

U2 - 10.1109/SNW.2010.5562558

DO - 10.1109/SNW.2010.5562558

M3 - Conference contribution

AN - SCOPUS:77958022757

SN - 9781424477272

T3 - 2010 Silicon Nanoelectronics Workshop, SNW 2010

BT - 2010 Silicon Nanoelectronics Workshop, SNW 2010

T2 - 2010 15th Silicon Nanoelectronics Workshop, SNW 2010

Y2 - 13 June 2010 through 14 June 2010

ER -

Novel Ni germanide technology with co-sputtering of Ni and Pt for thermally stable Ge MOSFETs on Ge-on-Si substrate

Abstract

Publication series

Other

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this