Novel capacitorless single-transistor charge-trap dram (1T CT DRAM) utilizing electrons

M. Günhan Ertosun; Kwan Yong Lim; Chanro Park; Jungwoo Oh; Paul Kirsch; Krishna C. Saraswat

doi:10.1109/LED.2010.2043634

Novel capacitorless single-transistor charge-trap dram (1T CT DRAM) utilizing electrons

M. Günhan Ertosun, Kwan Yong Lim, Chanro Park, Jungwoo Oh, Paul Kirsch, Krishna C. Saraswat

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

For the first time, we propose and experimentally demonstrate a novel single-transistor(1T) DRAM: Capacitorless Single-Transistor Charge-Trap DRAM (1T CT DRAM). The memory operation is obtained by engineering the body of the transistor with CTs by creating intentional electron-trapping zones. This memory makes use of charge traps and uses the existence or absence of electrons in its body instead of holes that are conventionally used in 1T DRAMs whose operation depends on floating-body effects. The DRAM operation is experimentally demonstrated.

Original language	English
Article number	5438751
Pages (from-to)	405-407
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	31
Issue number	5
DOIs	https://doi.org/10.1109/LED.2010.2043634
Publication status	Published - 2010 May

Bibliographical note

Funding Information:
Manuscript received December 29, 2009. Date of publication March 25, 2010; date of current version April 23, 2010. This work was supported in part by the Stanford University Initiative for Nonvolatile Memory Materials and Devices (NMTRI) and in part a Stanford Graduate Fellowship. The review of this letter was arranged by Editor S. Kawamura.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2010.2043634

Cite this

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abstract = "For the first time, we propose and experimentally demonstrate a novel single-transistor(1T) DRAM: Capacitorless Single-Transistor Charge-Trap DRAM (1T CT DRAM). The memory operation is obtained by engineering the body of the transistor with CTs by creating intentional electron-trapping zones. This memory makes use of charge traps and uses the existence or absence of electrons in its body instead of holes that are conventionally used in 1T DRAMs whose operation depends on floating-body effects. The DRAM operation is experimentally demonstrated.",

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AU - Kirsch, Paul

AU - Saraswat, Krishna C.

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Novel capacitorless single-transistor charge-trap dram (1T CT DRAM) utilizing electrons

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

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