Normally-Off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric

Hyun Seop Kim; Sang Woo Han; Won Ho Jang; Chun Hyung Cho; Kwang Seok Seo; Jungwoo Oh; Ho Young Cha

doi:10.1109/LED.2017.2720719

Normally-Off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric

Hyun Seop Kim, Sang Woo Han, Won Ho Jang, Chun Hyung Cho, Kwang Seok Seo, Jungwoo Oh, Ho Young Cha

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

36 Citations (Scopus)

Abstract

We have developed a silicon oxynitride (SiON) deposition process using a plasma-enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal-insulator-semiconductor field-effect transistors (MISFETs). The optimized SiON film had a relative dielectric constant of 5.3 and a breakdown field of 12MV/cm. A normally-off GaN-on-Si MISFET fabricated with a 33-nm SiON gate dielectric exhibited a threshold voltage of ∼2 V, an ON-resistance of 7.85Ω·cm², and a breakdown voltage of 640 V at the OFF-state current density of 1 μA/mm. The extracted interface trap density was 1×10¹² cm^-2·eV^-1 at E_c - E_t = 0.442 eV, which resulted in negligible hysteresis and excellent dynamic characteristics.

Original language	English
Article number	7959555
Pages (from-to)	1090-1093
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	38
Issue number	8
DOIs	https://doi.org/10.1109/LED.2017.2720719
Publication status	Published - 2017 Aug

Bibliographical note

Funding Information:
This work was supported by NRF of Korea under Grant 2015R1A6A1A03031833, Grant 2012M3A7B4035274, and Grant 2016R1D1A1B03935445.

Publisher Copyright:
© 2017 IEEE.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2017.2720719

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@article{01f4560009e74011a8a7d59342807d3e,

title = "Normally-Off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric",

abstract = "We have developed a silicon oxynitride (SiON) deposition process using a plasma-enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal-insulator-semiconductor field-effect transistors (MISFETs). The optimized SiON film had a relative dielectric constant of 5.3 and a breakdown field of 12MV/cm. A normally-off GaN-on-Si MISFET fabricated with a 33-nm SiON gate dielectric exhibited a threshold voltage of ∼2 V, an ON-resistance of 7.85Ω·cm2, and a breakdown voltage of 640 V at the OFF-state current density of 1 μA/mm. The extracted interface trap density was 1×1012 cm-2·eV-1 at Ec - Et = 0.442 eV, which resulted in negligible hysteresis and excellent dynamic characteristics.",

author = "Kim, {Hyun Seop} and Han, {Sang Woo} and Jang, {Won Ho} and Cho, {Chun Hyung} and Seo, {Kwang Seok} and Jungwoo Oh and Cha, {Ho Young}",

note = "Funding Information: This work was supported by NRF of Korea under Grant 2015R1A6A1A03031833, Grant 2012M3A7B4035274, and Grant 2016R1D1A1B03935445. Publisher Copyright: {\textcopyright} 2017 IEEE.",

year = "2017",

month = aug,

doi = "10.1109/LED.2017.2720719",

language = "English",

volume = "38",

pages = "1090--1093",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "8",

}

TY - JOUR

T1 - Normally-Off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric

AU - Kim, Hyun Seop

AU - Han, Sang Woo

AU - Jang, Won Ho

AU - Cho, Chun Hyung

AU - Seo, Kwang Seok

AU - Oh, Jungwoo

AU - Cha, Ho Young

PY - 2017/8

Y1 - 2017/8

N2 - We have developed a silicon oxynitride (SiON) deposition process using a plasma-enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal-insulator-semiconductor field-effect transistors (MISFETs). The optimized SiON film had a relative dielectric constant of 5.3 and a breakdown field of 12MV/cm. A normally-off GaN-on-Si MISFET fabricated with a 33-nm SiON gate dielectric exhibited a threshold voltage of ∼2 V, an ON-resistance of 7.85Ω·cm2, and a breakdown voltage of 640 V at the OFF-state current density of 1 μA/mm. The extracted interface trap density was 1×1012 cm-2·eV-1 at Ec - Et = 0.442 eV, which resulted in negligible hysteresis and excellent dynamic characteristics.

AB - We have developed a silicon oxynitride (SiON) deposition process using a plasma-enhanced chemical vapor deposition system for the gate dielectric of GaN-on-Si metal-insulator-semiconductor field-effect transistors (MISFETs). The optimized SiON film had a relative dielectric constant of 5.3 and a breakdown field of 12MV/cm. A normally-off GaN-on-Si MISFET fabricated with a 33-nm SiON gate dielectric exhibited a threshold voltage of ∼2 V, an ON-resistance of 7.85Ω·cm2, and a breakdown voltage of 640 V at the OFF-state current density of 1 μA/mm. The extracted interface trap density was 1×1012 cm-2·eV-1 at Ec - Et = 0.442 eV, which resulted in negligible hysteresis and excellent dynamic characteristics.

UR - http://www.scopus.com/inward/record.url?scp=85023751579&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85023751579&partnerID=8YFLogxK

U2 - 10.1109/LED.2017.2720719

DO - 10.1109/LED.2017.2720719

M3 - Article

AN - SCOPUS:85023751579

SN - 0741-3106

VL - 38

SP - 1090

EP - 1093

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 8

M1 - 7959555

ER -

Normally-Off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric

Abstract

Bibliographical note

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