Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology

Junghyeon Hwang; Sehee Lim; Giuk Kim; Seong Ook Jung; Sanghun Jeon

doi:10.1109/LED.2022.3179385

Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology

Junghyeon Hwang, Sehee Lim, Giuk Kim, Seong Ook Jung, Sanghun Jeon

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

12 Citations (Scopus)

Abstract

We demonstrate that a non-volatile majority function logic is formed by a 1T-nCstorage -1Cread cell in which a hafnia ferroelectric capacitor is used for computing in memory (CiM) and nonvolatile logic-in-memory (NV- LiM). We show a write operation of low voltage (< 3V) and high speed (< 20ns), with improved vphantomint endurance characteristics over 1011 cycles by adopting a novel write and read method. We performed a circuit-level analysis of an NV 1bit full adder. This adder achieves a power-delay-area product that is 4.8 and 53.5 times higher than the previous FeFET-based 1bit full adder when approximate computing is excluded and applied, respectively.

Original language	English
Pages (from-to)	1049-1052
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	43
Issue number	7
DOIs	https://doi.org/10.1109/LED.2022.3179385
Publication status	Published - 2022 Jul 1

Bibliographical note

Publisher Copyright:
© 1980-2012 IEEE.

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2022.3179385

Cite this

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abstract = "We demonstrate that a non-volatile majority function logic is formed by a 1T-nCstorage -1Cread cell in which a hafnia ferroelectric capacitor is used for computing in memory (CiM) and nonvolatile logic-in-memory (NV- LiM). We show a write operation of low voltage (< 3V) and high speed (< 20ns), with improved vphantomint endurance characteristics over 1011 cycles by adopting a novel write and read method. We performed a circuit-level analysis of an NV 1bit full adder. This adder achieves a power-delay-area product that is 4.8 and 53.5 times higher than the previous FeFET-based 1bit full adder when approximate computing is excluded and applied, respectively.",

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AU - Lim, Sehee

AU - Kim, Giuk

AU - Jung, Seong Ook

AU - Jeon, Sanghun

PY - 2022/7/1

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AB - We demonstrate that a non-volatile majority function logic is formed by a 1T-nCstorage -1Cread cell in which a hafnia ferroelectric capacitor is used for computing in memory (CiM) and nonvolatile logic-in-memory (NV- LiM). We show a write operation of low voltage (< 3V) and high speed (< 20ns), with improved vphantomint endurance characteristics over 1011 cycles by adopting a novel write and read method. We performed a circuit-level analysis of an NV 1bit full adder. This adder achieves a power-delay-area product that is 4.8 and 53.5 times higher than the previous FeFET-based 1bit full adder when approximate computing is excluded and applied, respectively.

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Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology

Abstract

Bibliographical note

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