Noise-tolerant DAC BIST scheme using integral calculus approach

Hyeonuk Son, Incheol Kim, Sang Goog Lee, Jin Ho Ahn, Jeong Do Kim, Sungho Kang

Research output: Contribution to journalArticlepeer-review


This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.

Original languageEnglish
Pages (from-to)1344-1347
Number of pages4
JournalIEICE Transactions on Electronics
Issue number8
Publication statusPublished - 2011 Aug

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


Dive into the research topics of 'Noise-tolerant DAC BIST scheme using integral calculus approach'. Together they form a unique fingerprint.

Cite this