Neuromorphic Hardware Accelerators

Pamul Yadav; Ashutosh Mishra; Shiho Kim

doi:10.1007/978-3-031-22170-5_8

Neuromorphic Hardware Accelerators

Pamul Yadav, Ashutosh Mishra, Shiho Kim

School of Integrated Technology

Research output: Chapter in Book/Report/Conference proceeding › Chapter

1 Citation (Scopus)

Abstract

Despite the tremendous advancements in deep neural network research to achieve Artificial General Intelligence, it continues to suffer from various issues such as higher power consumption and longer training time. Many of these issues result from a fundamental drawback of the current computing architecture, that is, the von Neumann bottleneck. Therefore, there is growing research to develop computing architectures to eliminate this bottleneck. One of the most promising approaches is neuromorphic computing, which takes direct inspiration from the structure of a biological neuron. This chapter discusses core neuromorphic computing concepts and reviews several ongoing projects on neuromorphic hardware accelerators.

Original language	English
Title of host publication	Artificial Intelligence and Hardware Accelerators
Publisher	Springer International Publishing
Pages	225-268
Number of pages	44
ISBN (Electronic)	9783031221705
ISBN (Print)	9783031221699
DOIs	https://doi.org/10.1007/978-3-031-22170-5_8
Publication status	Published - 2023 Jan 1

Bibliographical note

Publisher Copyright:
© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerland AG 2023.

All Science Journal Classification (ASJC) codes

General Engineering
General Computer Science

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10.1007/978-3-031-22170-5_8

Cite this

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AU - Mishra, Ashutosh

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Neuromorphic Hardware Accelerators

Abstract

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