Near optimal repair rate built-in redundancy analysis with very small hardware overhead

Woosung Lee; Keewon Cho; Jooyoung Kim; Sungho Kang

doi:10.1109/ISQED.2015.7085465

Near optimal repair rate built-in redundancy analysis with very small hardware overhead

Woosung Lee, Keewon Cho, Jooyoung Kim, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

As the memory density and capacity grows, it is more likely that the number of defects increases. For this reason, in order to improve memory yield, repair analysis is widely used. Built-in redundancy analysis (BIRA) is regarded as one of the solutions to improve memory yield. However, the previous BIRA approaches require large hardware overhead to achieve an optimal repair rate. This is the main obstacle to use BIRA practically. Therefore, a new BIRA is proposed to reduce the hardware overhead significantly using spare allocation probability according to the number of faults on a sparse faulty line. The experimental results show that the hardware overhead of the proposed approach can be considerably reduced with slight loss of repair rate. Therefore, it can be used as a practical solution for BIRA.

Original language	English
Title of host publication	Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015
Publisher	IEEE Computer Society
Pages	435-439
Number of pages	5
ISBN (Electronic)	9781479975815
DOIs	https://doi.org/10.1109/ISQED.2015.7085465
Publication status	Published - 2015 Apr 13
Event	16th International Symposium on Quality Electronic Design, ISQED 2015 - Santa Clara, United States Duration: 2015 Mar 2 → 2015 Mar 4

Publication series

Name	Proceedings - International Symposium on Quality Electronic Design, ISQED
Volume	2015-April
ISSN (Print)	1948-3287
ISSN (Electronic)	1948-3295

Other

Other	16th International Symposium on Quality Electronic Design, ISQED 2015
Country/Territory	United States
City	Santa Clara
Period	15/3/2 → 15/3/4

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ISQED.2015.7085465

Cite this

Lee, W., Cho, K., Kim, J., & Kang, S. (2015). Near optimal repair rate built-in redundancy analysis with very small hardware overhead. In Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015 (pp. 435-439). [7085465] (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2015-April). IEEE Computer Society. https://doi.org/10.1109/ISQED.2015.7085465

@inproceedings{e1af3fe94f3c450084fc2608d05f0826,

title = "Near optimal repair rate built-in redundancy analysis with very small hardware overhead",

abstract = "As the memory density and capacity grows, it is more likely that the number of defects increases. For this reason, in order to improve memory yield, repair analysis is widely used. Built-in redundancy analysis (BIRA) is regarded as one of the solutions to improve memory yield. However, the previous BIRA approaches require large hardware overhead to achieve an optimal repair rate. This is the main obstacle to use BIRA practically. Therefore, a new BIRA is proposed to reduce the hardware overhead significantly using spare allocation probability according to the number of faults on a sparse faulty line. The experimental results show that the hardware overhead of the proposed approach can be considerably reduced with slight loss of repair rate. Therefore, it can be used as a practical solution for BIRA.",

author = "Woosung Lee and Keewon Cho and Jooyoung Kim and Sungho Kang",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 16th International Symposium on Quality Electronic Design, ISQED 2015 ; Conference date: 02-03-2015 Through 04-03-2015",

year = "2015",

month = apr,

day = "13",

doi = "10.1109/ISQED.2015.7085465",

language = "English",

series = "Proceedings - International Symposium on Quality Electronic Design, ISQED",

publisher = "IEEE Computer Society",

pages = "435--439",

booktitle = "Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015",

address = "United States",

}

Lee, W, Cho, K, Kim, J & Kang, S 2015, Near optimal repair rate built-in redundancy analysis with very small hardware overhead. in Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015., 7085465, Proceedings - International Symposium on Quality Electronic Design, ISQED, vol. 2015-April, IEEE Computer Society, pp. 435-439, 16th International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, United States, 15/3/2. https://doi.org/10.1109/ISQED.2015.7085465

Near optimal repair rate built-in redundancy analysis with very small hardware overhead. / Lee, Woosung; Cho, Keewon; Kim, Jooyoung et al.
Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015. IEEE Computer Society, 2015. p. 435-439 7085465 (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2015-April).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Near optimal repair rate built-in redundancy analysis with very small hardware overhead

AU - Lee, Woosung

AU - Cho, Keewon

AU - Kim, Jooyoung

AU - Kang, Sungho

PY - 2015/4/13

Y1 - 2015/4/13

N2 - As the memory density and capacity grows, it is more likely that the number of defects increases. For this reason, in order to improve memory yield, repair analysis is widely used. Built-in redundancy analysis (BIRA) is regarded as one of the solutions to improve memory yield. However, the previous BIRA approaches require large hardware overhead to achieve an optimal repair rate. This is the main obstacle to use BIRA practically. Therefore, a new BIRA is proposed to reduce the hardware overhead significantly using spare allocation probability according to the number of faults on a sparse faulty line. The experimental results show that the hardware overhead of the proposed approach can be considerably reduced with slight loss of repair rate. Therefore, it can be used as a practical solution for BIRA.

AB - As the memory density and capacity grows, it is more likely that the number of defects increases. For this reason, in order to improve memory yield, repair analysis is widely used. Built-in redundancy analysis (BIRA) is regarded as one of the solutions to improve memory yield. However, the previous BIRA approaches require large hardware overhead to achieve an optimal repair rate. This is the main obstacle to use BIRA practically. Therefore, a new BIRA is proposed to reduce the hardware overhead significantly using spare allocation probability according to the number of faults on a sparse faulty line. The experimental results show that the hardware overhead of the proposed approach can be considerably reduced with slight loss of repair rate. Therefore, it can be used as a practical solution for BIRA.

UR - http://www.scopus.com/inward/record.url?scp=84944326536&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84944326536&partnerID=8YFLogxK

U2 - 10.1109/ISQED.2015.7085465

DO - 10.1109/ISQED.2015.7085465

M3 - Conference contribution

AN - SCOPUS:84944326536

T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED

SP - 435

EP - 439

BT - Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015

PB - IEEE Computer Society

T2 - 16th International Symposium on Quality Electronic Design, ISQED 2015

Y2 - 2 March 2015 through 4 March 2015

ER -

Near optimal repair rate built-in redundancy analysis with very small hardware overhead

Abstract

Publication series

Other

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this