Multicore speedup models using frequency scaling with fixed power budget

Seungwon Lee; Seung Hun Kim; Won Woo Ro

doi:10.1109/ELINFOCOM.2014.6914403

Multicore speedup models using frequency scaling with fixed power budget

Seungwon Lee, Seung Hun Kim, Won Woo Ro

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.

Original language	English
Title of host publication	13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479939428
DOIs	https://doi.org/10.1109/ELINFOCOM.2014.6914403
Publication status	Published - 2014 Sept 30
Event	13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Kota Kinabalu, Malaysia Duration: 2014 Jan 15 → 2014 Jan 18

Publication series

Name	13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings

Other

Other	13th International Conference on Electronics, Information, and Communication, ICEIC 2014
Country/Territory	Malaysia
City	Kota Kinabalu
Period	14/1/15 → 14/1/18

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

All Science Journal Classification (ASJC) codes

Control and Systems Engineering
Electrical and Electronic Engineering

Access to Document

10.1109/ELINFOCOM.2014.6914403

Cite this

Lee, S., Kim, S. H., & Ro, W. W. (2014). Multicore speedup models using frequency scaling with fixed power budget. In 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings [6914403] (13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ELINFOCOM.2014.6914403

Lee, Seungwon ; Kim, Seung Hun ; Ro, Won Woo. / Multicore speedup models using frequency scaling with fixed power budget. 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014. (13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings).

@inproceedings{3b76589b964a41e39f3e148a3013581e,

title = "Multicore speedup models using frequency scaling with fixed power budget",

abstract = "Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.",

author = "Seungwon Lee and Kim, {Seung Hun} and Ro, {Won Woo}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 ; Conference date: 15-01-2014 Through 18-01-2014",

year = "2014",

month = sep,

day = "30",

doi = "10.1109/ELINFOCOM.2014.6914403",

language = "English",

series = "13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings",

address = "United States",

}

Lee, S, Kim, SH & Ro, WW 2014, Multicore speedup models using frequency scaling with fixed power budget. in 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings., 6914403, 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 13th International Conference on Electronics, Information, and Communication, ICEIC 2014, Kota Kinabalu, Malaysia, 14/1/15. https://doi.org/10.1109/ELINFOCOM.2014.6914403

Multicore speedup models using frequency scaling with fixed power budget. / Lee, Seungwon; Kim, Seung Hun; Ro, Won Woo.
13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014. 6914403 (13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Multicore speedup models using frequency scaling with fixed power budget

AU - Lee, Seungwon

AU - Kim, Seung Hun

AU - Ro, Won Woo

PY - 2014/9/30

Y1 - 2014/9/30

N2 - Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.

AB - Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.

UR - http://www.scopus.com/inward/record.url?scp=84910047972&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84910047972&partnerID=8YFLogxK

U2 - 10.1109/ELINFOCOM.2014.6914403

DO - 10.1109/ELINFOCOM.2014.6914403

M3 - Conference contribution

AN - SCOPUS:84910047972

T3 - 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings

BT - 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 13th International Conference on Electronics, Information, and Communication, ICEIC 2014

Y2 - 15 January 2014 through 18 January 2014

ER -

Lee S, Kim SH, Ro WW. Multicore speedup models using frequency scaling with fixed power budget. In 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2014. 6914403. (13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings). doi: 10.1109/ELINFOCOM.2014.6914403

Multicore speedup models using frequency scaling with fixed power budget

Abstract

Publication series

Other

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this