Memory ECC architecutre utilizing memory column spares

Jong Hyuk Park; Joon Sung Yang

doi:10.1109/ISOCC.2016.7799826

Memory ECC architecutre utilizing memory column spares

Jong Hyuk Park, Joon Sung Yang

College of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Advanced process technology allows high memory density. However, the memory cell shrinkage introduces more memory defects and this causes a memory yield problem. To overcome the issue, memory ECC has become a critical solution. This paper proposes a hardware architecture to support memory ECC utilizing memory spares. Overheads imposed by the proposed architecture are analyzed and compared against conventional non-ECC memory architecture.

Original language	English
Title of host publication	ISOCC 2016 - International SoC Design Conference
Subtitle of host publication	Smart SoC for Intelligent Things
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	359-360
Number of pages	2
ISBN (Electronic)	9781467393089
DOIs	https://doi.org/10.1109/ISOCC.2016.7799826
Publication status	Published - 2016 Dec 27
Event	13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of Duration: 2016 Oct 23 → 2016 Oct 26

Publication series

Name	ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things

Other

Other	13th International SoC Design Conference, ISOCC 2016
Country/Territory	Korea, Republic of
City	Jeju
Period	16/10/23 → 16/10/26

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/ISOCC.2016.7799826

Cite this

Park, J. H., & Yang, J. S. (2016). Memory ECC architecutre utilizing memory column spares. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things (pp. 359-360). Article 7799826 (ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2016.7799826

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title = "Memory ECC architecutre utilizing memory column spares",

abstract = "Advanced process technology allows high memory density. However, the memory cell shrinkage introduces more memory defects and this causes a memory yield problem. To overcome the issue, memory ECC has become a critical solution. This paper proposes a hardware architecture to support memory ECC utilizing memory spares. Overheads imposed by the proposed architecture are analyzed and compared against conventional non-ECC memory architecture.",

author = "Park, {Jong Hyuk} and Yang, {Joon Sung}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th International SoC Design Conference, ISOCC 2016 ; Conference date: 23-10-2016 Through 26-10-2016",

year = "2016",

month = dec,

day = "27",

doi = "10.1109/ISOCC.2016.7799826",

language = "English",

series = "ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Park, JH & Yang, JS 2016, Memory ECC architecutre utilizing memory column spares. in ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things., 7799826, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things, Institute of Electrical and Electronics Engineers Inc., pp. 359-360, 13th International SoC Design Conference, ISOCC 2016, Jeju, Korea, Republic of, 16/10/23. https://doi.org/10.1109/ISOCC.2016.7799826

Memory ECC architecutre utilizing memory column spares. / Park, Jong Hyuk; Yang, Joon Sung.
ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., 2016. p. 359-360 7799826 (ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

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AU - Park, Jong Hyuk

AU - Yang, Joon Sung

PY - 2016/12/27

Y1 - 2016/12/27

N2 - Advanced process technology allows high memory density. However, the memory cell shrinkage introduces more memory defects and this causes a memory yield problem. To overcome the issue, memory ECC has become a critical solution. This paper proposes a hardware architecture to support memory ECC utilizing memory spares. Overheads imposed by the proposed architecture are analyzed and compared against conventional non-ECC memory architecture.

AB - Advanced process technology allows high memory density. However, the memory cell shrinkage introduces more memory defects and this causes a memory yield problem. To overcome the issue, memory ECC has become a critical solution. This paper proposes a hardware architecture to support memory ECC utilizing memory spares. Overheads imposed by the proposed architecture are analyzed and compared against conventional non-ECC memory architecture.

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T2 - 13th International SoC Design Conference, ISOCC 2016

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ER -

Memory ECC architecutre utilizing memory column spares

Abstract

Publication series

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Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

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