Maximizing DRAM performance using selective operating frequency boosting

Jung Ho Jung, Seung Hun Kim, Changmin Lee, Won Woo Ro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Advance of semiconductor manufacturing technology enables nano-scale processes for chip fabrication. However, process variation gets worse as the scales down, and finally causes performance discrepancies among the dies in a wafer and the transistors in a die. Especially in conventional Dynamic Random Access Memory (DRAM), billions of memory cells are contained in the devices and each cell is composed of one transistor and one capacitor. Therefore, at a fine-grain level, operating frequency of the DRAM device is determined by the memory cell which has the lowest performance. The fact implies that some region of the device can operate with a higher frequency than a manufacturer marked. In this paper, we propose a selective operating frequency boosting scheme of DRAM device to provide improved performance. We show the feasibility of the proposed scheme according to the portion of the boosting enabled portion.

Original languageEnglish
Title of host publicationISCE 2014 - 18th IEEE International Symposium on Consumer Electronics
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479945924
DOIs
Publication statusPublished - 2014
Event18th IEEE International Symposium on Consumer Electronics, ISCE 2014 - Jeju, Korea, Republic of
Duration: 2014 Jun 222014 Jun 25

Publication series

NameProceedings of the International Symposium on Consumer Electronics, ISCE

Other

Other18th IEEE International Symposium on Consumer Electronics, ISCE 2014
Country/TerritoryKorea, Republic of
CityJeju
Period14/6/2214/6/25

All Science Journal Classification (ASJC) codes

  • General Engineering

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