Low-voltage pentacene thin-film transistor with a polymer/ YO x/polymer triple-layer dielectric on a plastic substrate

D. K. Hwang, Jeong M. Choi, Ji Hoon Park, Jae Hoon Kim, Eugene Kim, Seongil Im

Research output: Contribution to journalArticlepeer-review

12 Citations (Scopus)

Abstract

We report on the fabrication of pentacene thin-film transistors (TFTs) with a poly-4-vinylphenol (PVP)yttrium oxide (YOx) PVP triple-layer dielectric deposited on an indium-tin oxide (ITO)/plastic substrate. Our PVP YOx PVP triple layer exhibited 2 orders of magnitude lower gate current leakage than that of a PVP YOx double layer because the former has a PVP buffer to cope with the irregular surfaces of the ITO/plastic substrate. Adopting the triple-layer dielectric, our pentacene TFTs with NiOx and Au source/drain electrodes exhibited high field mobilities of ∼1.37 and 0.84 cm2 V s, respectively, under low driving voltage conditions (less than -8 V). We conclude that our triple-layer approach is quite a promising and practical way to realize a flexible low-voltage high-performance organic TFT on ITO/plastic substrates with rough surfaces.

Original languageEnglish
Pages (from-to)H117-H119
JournalElectrochemical and Solid-State Letters
Volume10
Issue number4
DOIs
Publication statusPublished - 2007

All Science Journal Classification (ASJC) codes

  • Chemical Engineering(all)
  • Materials Science(all)
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering

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