TY - GEN
T1 - Low-voltage green transistor using ultra shallow junction and hetero-tunneling
AU - Bowonder, Anupama
AU - Patel, Pratik
AU - Jeon, Kanghoon
AU - Oh, Jungwoo
AU - Majhi, Prashant
AU - Tseng, Hsing Huang
AU - Hu, Chenming
PY - 2008
Y1 - 2008
N2 - A novel hetero-tunnel transistor (HtFET) with a heterostructure and ultra shallow junction parallel to the dielectric interface is proposed for low-voltage (low-power) electronics. Its potential of scaling Vdd down to 0.2 V is examined with quantum mechanical tunneling theory. Data from high-K metal-gate, Si on Ge hetero-tunnel transistor verifies the HtFET concept.
AB - A novel hetero-tunnel transistor (HtFET) with a heterostructure and ultra shallow junction parallel to the dielectric interface is proposed for low-voltage (low-power) electronics. Its potential of scaling Vdd down to 0.2 V is examined with quantum mechanical tunneling theory. Data from high-K metal-gate, Si on Ge hetero-tunnel transistor verifies the HtFET concept.
UR - http://www.scopus.com/inward/record.url?scp=50849096106&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=50849096106&partnerID=8YFLogxK
U2 - 10.1109/IWJT.2008.4540025
DO - 10.1109/IWJT.2008.4540025
M3 - Conference contribution
AN - SCOPUS:50849096106
SN - 9781424417384
T3 - IWJT-2008 - Extended Abstracts 2008 International Workshop on Junction Technology
SP - 93
EP - 96
BT - IWJT-2008 - Extended Abstracts 2008 International Workshop on Junction Technology
T2 - IWJT-2008 - International Workshop on Junction Technology
Y2 - 15 May 2008 through 16 May 2008
ER -