Low-power embedded processor design using branch direction

Gi Ho Park, Jung Wook Park, Gunok Jung, Shin Dug Kim

Research output: Contribution to journalArticlepeer-review


This paper presents a wordline gating logic for reducing unnecessary BTB accesses. Partial bit of the branch predictor was simultaneously recorded in the middle of BTB to prevent further SRAM operation. Experimental results with embedded applications showed that the proposed mechanism reduces around 38% of BTB power consumption.

Original languageEnglish
Pages (from-to)3180-3181
Number of pages2
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Issue number12
Publication statusPublished - 2009 Dec

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics


Dive into the research topics of 'Low-power embedded processor design using branch direction'. Together they form a unique fingerprint.

Cite this