Abstract
With the recent development of the low-latency storage devices, IO latency is not a critical performance bottleneck of filesystems any more. Instead, CPU Utilization and lock contention have become more critical factors to achieve higher performance. However, EXT4's transaction commit procedure is not suitable for low-latency storage devices due to the presence of the transaction's LOCKED state. In this paper, we first analyze blocked threads that have tried to update filesystem because of LOCKED state and fsync() operation. We then propose an Elimination Transaction Lock-Up scheme that optimizes a transaction commit procedure for low-latency SSDs. With the lock-up elimination scheme, transaction Lock-up overheads from journaling threads can be efficiently eliminated while still ensuring consistency of the EXT4 filesystem.
Original language | English |
---|---|
Title of host publication | Proceedings - 9th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2020 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781728184821 |
DOIs | |
Publication status | Published - 2020 Aug |
Event | 9th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2020 - Virtual, Seoul, Korea, Republic of Duration: 2020 Aug 19 → 2020 Aug 21 |
Publication series
Name | Proceedings - 9th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2020 |
---|
Conference
Conference | 9th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2020 |
---|---|
Country/Territory | Korea, Republic of |
City | Virtual, Seoul |
Period | 20/8/19 → 20/8/21 |
Bibliographical note
Funding Information:VIII. ACKNOWLEDGEMENT This work was supported by Institute for Information communications Technology Promotion (IITP) grant funded by the Korea government (MSIT) (No.2018-0-00549) and was supported by the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT & Future Planning (NRF-2020RIA2C3008525)
Publisher Copyright:
© 2020 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture