Improving the gate stability of ZnO thin-film transistors with aluminum oxide dielectric layers

We report on the fabrication of gate-stable ZnO thin-film transistors (TFTs) with aluminum oxide dielectric. When an off-stoichiometric AlO _x was deposited at room temperature, the ZnO-TFT revealed unreliable transfer characteristics: a large drain current-gate bias (I_D - V_G) hysteresis and a large amount of threshold voltage (VT) shift under gate-bias stress. As rapid thermal annealing (RTA) in O2 ambient was applied onto AlO_x at 300°C prior to ZnO channel deposition, the gate-bias reliability of the ZnO device was improved. The RTA might cause our AlO_x surface to be more stoichiometric and thus to be resistant against ZnO sputter-induced damage. When the bottom-gate ZnO-TFT was fabricated with a stoichiometric Al₂O₃ dielectric grown by atomic layer deposition (ALD), our device showed much more stable electrical characteristics than with the sputter-deposited off-stoichiometric AlO _x. Last, as an ultimate effort to improve the gate reliability, we fabricated a top-gate ZnO-TFT device adopting the same thick ALD-grown stoichiometric Al2 O3 as in the bottom-gate device. Our top-gate device with the Al2 O3 dielectric then showed no hysteresis and no VT shift after several times of gate bias sweep. We conclude that both the high quality dielectric and optimized device structure are necessary to realize electrically stable ZnO-TFTs.