Abstract
The authors report on the novel MOSFETs that were fabricated on thin relaxed Ge epitaxial layers grown on Si substrates. With controlled epi-Ge thickness, selectively activated shallow source/drain (S/D) junctions are formed using low dopant activation energy of Ge. The Ge epitaxial layers determine the effective S/D junction depth by selectively activating S/D implantations only in the Ge layers, while suppressing activation in the Si substrates. Low junction leakage current and capacitance are also achieved by forming S/D junctions in Si substrates as well as in Ge layers with controlled epi-Ge thickness. With this technique applied to Ge-on-Si epitaxial layers, Ge pMOSFETs showed an improvement in short channel effects and junction characteristics.
Original language | English |
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Pages (from-to) | 1044-1046 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 28 |
Issue number | 11 |
DOIs | |
Publication status | Published - 2007 Nov |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering