Implementation of low complexity inter prediction for IoT systems

Jaehyuk So, Junwon Mun, Kyungmook Oh, Jaeseok Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)


In this paper, we presents efficient hardware design of inter picture prediction in the slim - high efficient video coding (HEVC). Compared with fully implemented HM10.0, our compression performance of inter prediction hardware block is decreased due to simplification. However our target is Real-Time Encoder suitable for IoT, so our inter prediction block is small and fast. Also the verification of the inter prediction design is conducted using the ZYNQ and Virtex7.

Original languageEnglish
Title of host publicationISOCC 2016 - International SoC Design Conference
Subtitle of host publicationSmart SoC for Intelligent Things
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages2
ISBN (Electronic)9781467393089
Publication statusPublished - 2016 Dec 27
Event13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of
Duration: 2016 Oct 232016 Oct 26

Publication series

NameISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things


Other13th International SoC Design Conference, ISOCC 2016
Country/TerritoryKorea, Republic of

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Instrumentation


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