Unmanned aerial vehicles (UAVs) are often used in mission-critical applications, requiring a critical criterion in flight time. Unfortunately, severe power fluctuations, caused by specific flight patterns, degrade the deliverable capacity of the battery and hamper the flight time. A common approach to mitigating power fluctuations is to employ a hybrid energy storage system using a Li-ion battery with an ultracapacitor (UC). However, the conventional scheme poses inherent problems of low-energy density and power leakage due to the use of the UC and the supplementary hardware required for hybrid storage. In this article, we propose Hydrone, a reconfigurable battery architecture that maximizes the flight time of UAVs, overcoming the previous limitations. Hydrone addresses two key challenges that arise when hybrid energy storage is utilized in UAVs: 1) capacity loss and 2) power leakage. First, the proposed scheme compromises the capacity loss of hybrid storage by using a minimal capacity UC for use as a buffer to counteract the power fluctuations. Second, the power leakage of the hybrid battery is minimized by draining power from the UC only when it is necessary. To this end, the Hydrone architecture provides reconfigurability in hardware and offers two modes of battery operation, i.e., a battery-only mode and a hybrid mode. An appropriate operation is then selected at runtime depending on the flight situation and battery status. To switch modes, we employed a reinforcement learning-based switch control, reflecting the power fluctuation adequately on the flight and battery states. We implemented a hardware prototype to demonstrate the efficiency of Hydrone. Our extensive evaluation shows that the flight time of a UAV is prolonged up to 39% in our experiment setup.
|Number of pages||12|
|Journal||IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|
|Publication status||Published - 2020 Nov|
Bibliographical noteFunding Information:
Manuscript received April 17, 2020; revised June 9, 2020; accepted July 6, 2020. Date of publication October 2, 2020; date of current version October 27, 2020. This work was supported in part by the Next-Generation Information Computing Development Program funded by the Ministry of Science and ICT under Grant NRF-2017M3C4A7083677; in part by the National Research Foundation of Korea (NRF) under Grant NRF-2019R1A2C2004619; and in part by the Institute for Information and Communications Technology Promotion (IITP) grant funded by the Korea Government (MSIT) [Development of High-Assurance (≥EAL6) Secure Microkernel] under Grant 2018-0-00532. This article was presented in the International Conference on Hardware/Software Codesign and System Synthesis 2020 and appears as part of the ESWEEK-TCAD special issue. (Corresponding author: Hojung Cha.) The authors are with the Department of Computer Science, Yonsei University, Seoul 03722, South Korea (e-mail: email@example.com; sw.baek@ yonsei.ac.kr; firstname.lastname@example.org; email@example.com; firstname.lastname@example.org). Digital Object Identifier 10.1109/TCAD.2020.3013052
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All Science Journal Classification (ASJC) codes
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering