Histogram-based calibration method for pipeline ADCs

Hyeonuk Son, Jaewon Jang, Heetae Kim, Sungho Kang

Research output: Contribution to journalArticlepeer-review


Measurement and calibration of an analog-to-digital converter (ADC) using a histogram-based method requires a large volume of data and a long test duration, especially for a high resolution ADC. A fast and accurate calibration method for pipelined ADCs is proposed in this research. The proposed calibration method composes histograms through the outputs of each stage and calculates error sources. The digitized outputs of a stage are influenced directly by the operation of the prior stage, so the results of the histogram provide the information of errors in the prior stage. The composed histograms reduce the required samples and thus calibration time being implemented by simple modules. For 14-bit resolution pipelined ADC, the measured maximum integral non-linearity (INL) is improved from 6.78 to 0.52 LSB, and the spurious-free dynamic range (SFDR) and signal-to-noise-and-distortion ratio (SNDR) are improved from 67.0 to 106.2dB and from 65.6 to 84.8dB, respectively.

Original languageEnglish
Article numbere0129736
JournalPloS one
Issue number6
Publication statusPublished - 2015 Jun 12

Bibliographical note

Publisher Copyright:
© 2015 Son et al. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.

All Science Journal Classification (ASJC) codes

  • General


Dive into the research topics of 'Histogram-based calibration method for pipeline ADCs'. Together they form a unique fingerprint.

Cite this