TY - JOUR
T1 - Highly Reliable Top-Gated Thin-Film Transistor Memory with Semiconducting, Tunneling, Charge-Trapping, and Blocking Layers All of Flexible Polymers
AU - Wang, Wei
AU - Hwang, Sun Kak
AU - Kim, Kang Lib
AU - Lee, Ju Han
AU - Cho, Suk Man
AU - Park, Cheolmin
N1 - Publisher Copyright:
© 2015 American Chemical Society.
PY - 2015/5/27
Y1 - 2015/5/27
N2 - The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 104, read and write endurance cycles over 100, and time-dependent data retention of 108 s, even when fabricated on a mechanically flexible plastic substrate. (Chemical Equation Presented).
AB - The core components of a floating-gate organic thin-film transistor nonvolatile memory (OTFT-NVM) include the semiconducting channel layer, tunneling layer, floating-gate layer, and blocking layer, besides three terminal electrodes. In this study, we demonstrated OTFT-NVMs with all four constituent layers made of polymers based on consecutive spin-coating. Ambipolar charges injected and trapped in a polymer electret charge-controlling layer upon gate program and erase field successfully allowed for reliable bistable channel current levels at zero gate voltage. We have observed that the memory performance, in particular the reliability of a device, significantly depends upon the thickness of both blocking and tunneling layers, and with an optimized layer thickness and materials selection, our device exhibits a memory window of 15.4 V, on/off current ratio of 2 × 104, read and write endurance cycles over 100, and time-dependent data retention of 108 s, even when fabricated on a mechanically flexible plastic substrate. (Chemical Equation Presented).
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U2 - 10.1021/acsami.5b02213
DO - 10.1021/acsami.5b02213
M3 - Article
AN - SCOPUS:84930623854
SN - 1944-8244
VL - 7
SP - 10957
EP - 10965
JO - ACS Applied Materials and Interfaces
JF - ACS Applied Materials and Interfaces
IS - 20
ER -