Highly manufacturable 4Gb DRAM using 0.11μm DRAM technology

H. S. Jeong; W. S. Yang; Y. S. Hwang; C. H. Cho; S. Park; S. J. Ahn; Y. S. Chun; S. H. Shin; S. H. Song; J. Y. Lee; S. M. Jang; C. H. Lee; J. H. Jeong; M. H. Cho; J. K. Lee; K. Kim

Highly manufacturable 4Gb DRAM using 0.11μm DRAM technology

H. S. Jeong, W. S. Yang, Y. S. Hwang, C. H. Cho, S. Park, S. J. Ahn, Y. S. Chun, S. H. Shin, S. H. Song, J. Y. Lee, S. M. Jang, C. H. Lee, J. H. Jeong, M. H. Cho, J. K. Lee, K. Kim

Department of Physics

Research output: Contribution to journal › Conference article › peer-review

2 Citations (Scopus)

Abstract

4Gb DRAM has been developed successfully using 0.11μm DRAM technology. Considering manufacturability, we have focused to develop patterning technology that makes 0.11μm design rule possible using KrF lithography. Also, novel DRAM technologies, which give a big influence on the future DRAM integration, are developed as follows, using novel oxide(SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.

Original language	English
Pages (from-to)	353-356
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - 2000
Event	2000 IEEE International Electron Devices Meeting - San Francisco, CA, United States Duration: 2000 Dec 10 → 2000 Dec 13

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Materials Chemistry
Electrical and Electronic Engineering

Cite this

@article{3003450ee1604eb0b31b016960dfa104,

title = "Highly manufacturable 4Gb DRAM using 0.11μm DRAM technology",

abstract = "4Gb DRAM has been developed successfully using 0.11μm DRAM technology. Considering manufacturability, we have focused to develop patterning technology that makes 0.11μm design rule possible using KrF lithography. Also, novel DRAM technologies, which give a big influence on the future DRAM integration, are developed as follows, using novel oxide(SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.",

author = "Jeong, {H. S.} and Yang, {W. S.} and Hwang, {Y. S.} and Cho, {C. H.} and S. Park and Ahn, {S. J.} and Chun, {Y. S.} and Shin, {S. H.} and Song, {S. H.} and Lee, {J. Y.} and Jang, {S. M.} and Lee, {C. H.} and Jeong, {J. H.} and Cho, {M. H.} and Lee, {J. K.} and K. Kim",

year = "2000",

language = "English",

pages = "353--356",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2000 IEEE International Electron Devices Meeting ; Conference date: 10-12-2000 Through 13-12-2000",

}

TY - JOUR

T1 - Highly manufacturable 4Gb DRAM using 0.11μm DRAM technology

AU - Jeong, H. S.

AU - Yang, W. S.

AU - Hwang, Y. S.

AU - Cho, C. H.

AU - Park, S.

AU - Ahn, S. J.

AU - Chun, Y. S.

AU - Shin, S. H.

AU - Song, S. H.

AU - Lee, J. Y.

AU - Jang, S. M.

AU - Lee, C. H.

AU - Jeong, J. H.

AU - Cho, M. H.

AU - Lee, J. K.

AU - Kim, K.

PY - 2000

Y1 - 2000

N2 - 4Gb DRAM has been developed successfully using 0.11μm DRAM technology. Considering manufacturability, we have focused to develop patterning technology that makes 0.11μm design rule possible using KrF lithography. Also, novel DRAM technologies, which give a big influence on the future DRAM integration, are developed as follows, using novel oxide(SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.

AB - 4Gb DRAM has been developed successfully using 0.11μm DRAM technology. Considering manufacturability, we have focused to develop patterning technology that makes 0.11μm design rule possible using KrF lithography. Also, novel DRAM technologies, which give a big influence on the future DRAM integration, are developed as follows, using novel oxide(SOG) for the enhanced capability of gap-filling, borderless metal contact and stud processes, line-type storage node SAC, thin gate oxide, and CVD Al process for metal interconnections.

UR - http://www.scopus.com/inward/record.url?scp=0034448897&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0034448897&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0034448897

SN - 0163-1918

SP - 353

EP - 356

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - 2000 IEEE International Electron Devices Meeting

Y2 - 10 December 2000 through 13 December 2000

ER -

Highly manufacturable 4Gb DRAM using 0.11μm DRAM technology

Abstract

All Science Journal Classification (ASJC) codes

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