High mobility CMOS transistors on Si/SiGe heterostructure channels

Jungwoo Oh; Kanghoon Jeon; Se Hoon Lee; Jeff Huang; P. Y. Hung; Injo Ok; Barry Sassman; Dae Hong Ko; Paul Kirsch; Raj Jammy

doi:10.1016/j.mee.2012.02.030

High mobility CMOS transistors on Si/SiGe heterostructure channels

Jungwoo Oh, Kanghoon Jeon, Se Hoon Lee, Jeff Huang, P. Y. Hung, Injo Ok, Barry Sassman, Dae Hong Ko, Paul Kirsch, Raj Jammy

Research output: Contribution to journal › Article › peer-review

9 Citations (Scopus)

Abstract

We have demonstrated high mobility CMOS transistors on Si/SiGe heterostructure channels selectively grown on a Si (1 0 0) substrate. Electron and hole mobility is enhanced simultaneously on a single Si/SiGe heterostructure channel by confining electrons in a strained Si channel and holes in a SiGe channel, respectively. Enhanced carrier transports in strained Si or relaxed SiGe channels are confirmed by quantum mechanical simulation. Integration of high mobility CMOS on a single channel is a promising approach to extend Si CMOS technology without the process complexity associated with dual or hybrid channel approaches.

Original language	English
Pages (from-to)	26-28
Number of pages	3
Journal	Microelectronic Engineering
Volume	97
DOIs	https://doi.org/10.1016/j.mee.2012.02.030
Publication status	Published - 2012 Sept

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Condensed Matter Physics
Surfaces, Coatings and Films
Electrical and Electronic Engineering

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10.1016/j.mee.2012.02.030

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title = "High mobility CMOS transistors on Si/SiGe heterostructure channels",

abstract = "We have demonstrated high mobility CMOS transistors on Si/SiGe heterostructure channels selectively grown on a Si (1 0 0) substrate. Electron and hole mobility is enhanced simultaneously on a single Si/SiGe heterostructure channel by confining electrons in a strained Si channel and holes in a SiGe channel, respectively. Enhanced carrier transports in strained Si or relaxed SiGe channels are confirmed by quantum mechanical simulation. Integration of high mobility CMOS on a single channel is a promising approach to extend Si CMOS technology without the process complexity associated with dual or hybrid channel approaches.",

author = "Jungwoo Oh and Kanghoon Jeon and Lee, {Se Hoon} and Jeff Huang and Hung, {P. Y.} and Injo Ok and Barry Sassman and Ko, {Dae Hong} and Paul Kirsch and Raj Jammy",

year = "2012",

month = sep,

doi = "10.1016/j.mee.2012.02.030",

language = "English",

volume = "97",

pages = "26--28",

journal = "Microelectronic Engineering",

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TY - JOUR

T1 - High mobility CMOS transistors on Si/SiGe heterostructure channels

AU - Oh, Jungwoo

AU - Jeon, Kanghoon

AU - Lee, Se Hoon

AU - Huang, Jeff

AU - Hung, P. Y.

AU - Ok, Injo

AU - Sassman, Barry

AU - Ko, Dae Hong

AU - Kirsch, Paul

AU - Jammy, Raj

PY - 2012/9

Y1 - 2012/9

N2 - We have demonstrated high mobility CMOS transistors on Si/SiGe heterostructure channels selectively grown on a Si (1 0 0) substrate. Electron and hole mobility is enhanced simultaneously on a single Si/SiGe heterostructure channel by confining electrons in a strained Si channel and holes in a SiGe channel, respectively. Enhanced carrier transports in strained Si or relaxed SiGe channels are confirmed by quantum mechanical simulation. Integration of high mobility CMOS on a single channel is a promising approach to extend Si CMOS technology without the process complexity associated with dual or hybrid channel approaches.

AB - We have demonstrated high mobility CMOS transistors on Si/SiGe heterostructure channels selectively grown on a Si (1 0 0) substrate. Electron and hole mobility is enhanced simultaneously on a single Si/SiGe heterostructure channel by confining electrons in a strained Si channel and holes in a SiGe channel, respectively. Enhanced carrier transports in strained Si or relaxed SiGe channels are confirmed by quantum mechanical simulation. Integration of high mobility CMOS on a single channel is a promising approach to extend Si CMOS technology without the process complexity associated with dual or hybrid channel approaches.

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U2 - 10.1016/j.mee.2012.02.030

DO - 10.1016/j.mee.2012.02.030

M3 - Article

AN - SCOPUS:84861329002

SN - 0167-9317

VL - 97

SP - 26

EP - 28

JO - Microelectronic Engineering

JF - Microelectronic Engineering

ER -

High mobility CMOS transistors on Si/SiGe heterostructure channels

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All Science Journal Classification (ASJC) codes

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