Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO2 high-k metal gate stacks

Jungwoo Oh

doi:10.1016/j.cap.2013.11.039

Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO₂ high-k metal gate stacks

Jungwoo Oh

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si_0.75Ge_0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si_0.75Ge_0.25 channels, HfSiO₂ high-k gate dielectrics exhibited low C-V hysteresis (<10 mV), interface trap density (7.5 × 10¹⁰), and gate leakage current (∼10^-2A/cm² at an EOT of 13.4 Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si_0.75Ge_0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si_0.75Ge_0.25 channels, which are major causes of the high off-state current of small band gap energy Si_0.75Ge_0.25 pMOSFETs, by improving gate control over the channel.

Original language	English
Pages (from-to)	S69-S73
Journal	Current Applied Physics
Volume	14
Issue number	SUPPL. 1
DOIs	https://doi.org/10.1016/j.cap.2013.11.039
Publication status	Published - 2014 Mar 14

Bibliographical note

Funding Information:
The author would like to acknowledge the support of Front End Processes Division at SEMATECH Inc for the use of device fabrication, electrical-physical characterization, and helpful technical discussions. This work is supported by the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the “IT Consilience Creative Program (NIPA-2013-H0203-13-1002) supervised by the NIPA (National IT Industry Promotion Agency). This work was supported by the Future Semiconductor Device Technology Development Program (10044735) funded By MOTIE (Ministry of Trade, Industry & Energy) and KSRC (Korea Semiconductor Research Consortium).

All Science Journal Classification (ASJC) codes

Materials Science(all)
Physics and Astronomy(all)

Access to Document

10.1016/j.cap.2013.11.039

Cite this

@article{57341d55f7c84b4ea0de18a9b27de492,

title = "Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO2 high-k metal gate stacks",

abstract = "High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si0.75Ge0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si0.75Ge0.25 channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (<10 mV), interface trap density (7.5 × 1010), and gate leakage current (∼10-2A/cm2 at an EOT of 13.4 {\AA}), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si0.75Ge0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si0.75Ge0.25 channels, which are major causes of the high off-state current of small band gap energy Si0.75Ge0.25 pMOSFETs, by improving gate control over the channel.",

author = "Jungwoo Oh",

note = "Funding Information: The author would like to acknowledge the support of Front End Processes Division at SEMATECH Inc for the use of device fabrication, electrical-physical characterization, and helpful technical discussions. This work is supported by the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the “IT Consilience Creative Program (NIPA-2013-H0203-13-1002) supervised by the NIPA (National IT Industry Promotion Agency). This work was supported by the Future Semiconductor Device Technology Development Program (10044735) funded By MOTIE (Ministry of Trade, Industry & Energy) and KSRC (Korea Semiconductor Research Consortium).",

year = "2014",

month = mar,

day = "14",

doi = "10.1016/j.cap.2013.11.039",

language = "English",

volume = "14",

pages = "S69--S73",

journal = "Current Applied Physics",

issn = "1567-1739",

publisher = "Elsevier",

number = "SUPPL. 1",

}

TY - JOUR

T1 - Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO2 high-k metal gate stacks

AU - Oh, Jungwoo

N1 - Funding Information: The author would like to acknowledge the support of Front End Processes Division at SEMATECH Inc for the use of device fabrication, electrical-physical characterization, and helpful technical discussions. This work is supported by the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the “IT Consilience Creative Program (NIPA-2013-H0203-13-1002) supervised by the NIPA (National IT Industry Promotion Agency). This work was supported by the Future Semiconductor Device Technology Development Program (10044735) funded By MOTIE (Ministry of Trade, Industry & Energy) and KSRC (Korea Semiconductor Research Consortium).

PY - 2014/3/14

Y1 - 2014/3/14

N2 - High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si0.75Ge0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si0.75Ge0.25 channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (<10 mV), interface trap density (7.5 × 1010), and gate leakage current (∼10-2A/cm2 at an EOT of 13.4 Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si0.75Ge0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si0.75Ge0.25 channels, which are major causes of the high off-state current of small band gap energy Si0.75Ge0.25 pMOSFETs, by improving gate control over the channel.

AB - High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si0.75Ge0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si0.75Ge0.25 channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (<10 mV), interface trap density (7.5 × 1010), and gate leakage current (∼10-2A/cm2 at an EOT of 13.4 Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si0.75Ge0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si0.75Ge0.25 channels, which are major causes of the high off-state current of small band gap energy Si0.75Ge0.25 pMOSFETs, by improving gate control over the channel.

UR - http://www.scopus.com/inward/record.url?scp=84899444465&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84899444465&partnerID=8YFLogxK

U2 - 10.1016/j.cap.2013.11.039

DO - 10.1016/j.cap.2013.11.039

M3 - Article

AN - SCOPUS:84899444465

SN - 1567-1739

VL - 14

SP - S69-S73

JO - Current Applied Physics

JF - Current Applied Physics

IS - SUPPL. 1

ER -