Enhancing silicon debug via periodic monitoring

Joon Sung Yang, Nur A. Touba

Research output: Contribution to journalConference articlepeer-review

14 Citations (Scopus)


Scan-based debug methods give high observability of internal signals, however, they require halting the system to scan out responses from the circuit-under-debug (CUD). This is time consuming as many scan dumps may be required. In this paper, conventional scan chains that have non-destructive scan out capability are configured to operate as multiple MISRs during system operation. Information from the multiple MISRs is monitored periodically to identify erroneous behavior. A procedure for constructing the MISRs to maximize debug capability is described. A three step process is used to zero in on the first clock cycle in which an error is present with a small number of scan dumps. Moreover, a method for bypassing errors is described to permit debug in the presence of multiple bugs.

Original languageEnglish
Article number4641165
Pages (from-to)125-133
Number of pages9
JournalProceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Publication statusPublished - 2008
Event23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2008 - Boston, MA, United States
Duration: 2008 Oct 12008 Oct 3

All Science Journal Classification (ASJC) codes

  • General Engineering


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