Enhanced Device Stability of Ionic Gating Molybdenum Disulfide Transistors

The application of ion gels as gate dielectrics having an excellent mechanical flexibility and high capacitance to molybdenum disulfide (MoS₂) devices has been extensively studied; however, some issues remain unaddressed with regard to device stability such as gate leakage current, hysteresis, and bias stress instability. This study suggests a fabrication process for the ionic gating of the MoS₂ device to enhance the device stability by laminating the ion gel film onto the MoS₂ transistor using a cut-and-stick method and adding a passivation layer to remove unintentional parasitic capacitances generated by the capacitive coupling effect. The ionic gating MoS₂ transistor fabricated via this process operates at a low voltage (<1 V) and exhibits superior electrical characteristics such as low gate leakage currents (≈10⁻¹¹ A), high on–off ratio (>10⁶), and low hysteresis (<0.05 V). To further investigate the device stability, bias stress instability of the ionic gating MoS₂ transistor is examined. The charge-trapping mechanism is the main cause of threshold voltage shifts under gate bias stress.