Abstract
In this paper, the circuit is proposed that selectively changes the memory required to perform a write operation in a LUT composed of several spin-torque transfer magnetic RAM(STT-MRAM)s. When write a new data in the STT-MRAM LUT, unnecessary energy is consumed because the write operation is performed even though the data is the equal as the previous one. To overcome this problem, a comparison write scheme is proposed. The energy consumption is smaller than previous circuit's in [1], when 45 or less data is written again based on the 6bit-LUT having 64 memory cells.
Original language | English |
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Title of host publication | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 288-289 |
Number of pages | 2 |
ISBN (Electronic) | 9781538622858 |
DOIs | |
Publication status | Published - 2018 May 29 |
Event | 14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 2017 Nov 5 → 2017 Nov 8 |
Publication series
Name | Proceedings - International SoC Design Conference 2017, ISOCC 2017 |
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Other
Other | 14th International SoC Design Conference, ISOCC 2017 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 17/11/5 → 17/11/8 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials