Efficient multi-site testing using ate channel sharing

Kyoung Woon Eom, Dong Kwan Han, Yong Lee, Hak Song Kim, Sungho Kang

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


Multi-site testing is considered as a solution to reduce test costs. This paper presents a new channel sharing architecture that enables I/O pins to share automatic test equipment (ATE) channels using simple circuitry such as tri-state buffers, AND gates, and multiple-input signature registers (MISR). The main advantage of the proposed architecture is that it is implemented on probe cards and does not require any additional circuitry on a target device under test (DUT). In addition, the proposed architecture can perform DC parametric testing of the DUT such as leakage testing, even if the different DUTs share the same ATE channels. The simulation results show that the proposed architecture is very efficient and is applicable to both wafer testing and package testing.

Original languageEnglish
Pages (from-to)259-262
Number of pages4
JournalJournal of Semiconductor Technology and Science
Issue number3
Publication statusPublished - 2013 Jun

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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