Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

Ook Sang Yoo; Jungwoo Oh; Chang Yong Kang; Byoung Hun Lee; In Shik Han; Won Ho Choi; Hyuk Min Kwon; Min Ki Na; Prashant Majhi; Hsing Huang Tseng; Raj Jammy; Jin Suk Wang; Hi Deok Lee

doi:10.1016/j.mseb.2008.06.031

Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

Ook Sang Yoo, Jungwoo Oh, Chang Yong Kang, Byoung Hun Lee, In Shik Han, Won Ho Choi, Hyuk Min Kwon, Min Ki Na, Prashant Majhi, Hsing Huang Tseng, Raj Jammy, Jin Suk Wang, Hi Deok Lee

School of Integrated Technology

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

We demonstrated the effect of post-metallization annealing and Si interlayer thickness on Ge MOS capacitor on Ge-on-Si substrate with HfO₂/TaN. Ge outdiffusion and oxygen interdiffusion were completely suppressed by thick Si interfacial layer. As a result, formation of insufficient low-k Ge oxides was effectively inhibited. It is confirmed that gate current of Si passivated Ge MOS was decreased by Si IL and decrease of gate current, J_g is saturated after Si IL of 2 nm. It was also observed that when Si IL is thick enough to restrict Ge outdiffusion, increase of J_g is not due to the temperature-induced Ge outdiffusion but due to the partial crystallization of HfO₂ at higher annealing temperature.

Original language	English
Pages (from-to)	102-105
Number of pages	4
Journal	Materials Science and Engineering B: Solid-State Materials for Advanced Technology
Volume	154-155
Issue number	1-3
DOIs	https://doi.org/10.1016/j.mseb.2008.06.031
Publication status	Published - 2008 Dec 5

All Science Journal Classification (ASJC) codes

Materials Science(all)
Condensed Matter Physics
Mechanics of Materials
Mechanical Engineering

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10.1016/j.mseb.2008.06.031

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Yoo, O. S., Oh, J., Kang, C. Y., Lee, B. H., Han, I. S., Choi, W. H., Kwon, H. M., Na, M. K., Majhi, P., Tseng, H. H., Jammy, R., Wang, J. S., & Lee, H. D. (2008). Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate. Materials Science and Engineering B: Solid-State Materials for Advanced Technology, 154-155(1-3), 102-105. https://doi.org/10.1016/j.mseb.2008.06.031

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title = "Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate",

abstract = "We demonstrated the effect of post-metallization annealing and Si interlayer thickness on Ge MOS capacitor on Ge-on-Si substrate with HfO2/TaN. Ge outdiffusion and oxygen interdiffusion were completely suppressed by thick Si interfacial layer. As a result, formation of insufficient low-k Ge oxides was effectively inhibited. It is confirmed that gate current of Si passivated Ge MOS was decreased by Si IL and decrease of gate current, Jg is saturated after Si IL of 2 nm. It was also observed that when Si IL is thick enough to restrict Ge outdiffusion, increase of Jg is not due to the temperature-induced Ge outdiffusion but due to the partial crystallization of HfO2 at higher annealing temperature.",

author = "Yoo, {Ook Sang} and Jungwoo Oh and Kang, {Chang Yong} and Lee, {Byoung Hun} and Han, {In Shik} and Choi, {Won Ho} and Kwon, {Hyuk Min} and Na, {Min Ki} and Prashant Majhi and Tseng, {Hsing Huang} and Raj Jammy and Wang, {Jin Suk} and Lee, {Hi Deok}",

year = "2008",

month = dec,

day = "5",

doi = "10.1016/j.mseb.2008.06.031",

language = "English",

volume = "154-155",

pages = "102--105",

journal = "Materials Science and Engineering B: Solid-State Materials for Advanced Technology",

issn = "0921-5107",

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Yoo, OS, Oh, J, Kang, CY, Lee, BH, Han, IS, Choi, WH, Kwon, HM, Na, MK, Majhi, P, Tseng, HH, Jammy, R, Wang, JS & Lee, HD 2008, 'Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate', Materials Science and Engineering B: Solid-State Materials for Advanced Technology, vol. 154-155, no. 1-3, pp. 102-105. https://doi.org/10.1016/j.mseb.2008.06.031

TY - JOUR

T1 - Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

AU - Yoo, Ook Sang

AU - Oh, Jungwoo

AU - Kang, Chang Yong

AU - Lee, Byoung Hun

AU - Han, In Shik

AU - Choi, Won Ho

AU - Kwon, Hyuk Min

AU - Na, Min Ki

AU - Majhi, Prashant

AU - Tseng, Hsing Huang

AU - Jammy, Raj

AU - Wang, Jin Suk

AU - Lee, Hi Deok

PY - 2008/12/5

Y1 - 2008/12/5

N2 - We demonstrated the effect of post-metallization annealing and Si interlayer thickness on Ge MOS capacitor on Ge-on-Si substrate with HfO2/TaN. Ge outdiffusion and oxygen interdiffusion were completely suppressed by thick Si interfacial layer. As a result, formation of insufficient low-k Ge oxides was effectively inhibited. It is confirmed that gate current of Si passivated Ge MOS was decreased by Si IL and decrease of gate current, Jg is saturated after Si IL of 2 nm. It was also observed that when Si IL is thick enough to restrict Ge outdiffusion, increase of Jg is not due to the temperature-induced Ge outdiffusion but due to the partial crystallization of HfO2 at higher annealing temperature.

AB - We demonstrated the effect of post-metallization annealing and Si interlayer thickness on Ge MOS capacitor on Ge-on-Si substrate with HfO2/TaN. Ge outdiffusion and oxygen interdiffusion were completely suppressed by thick Si interfacial layer. As a result, formation of insufficient low-k Ge oxides was effectively inhibited. It is confirmed that gate current of Si passivated Ge MOS was decreased by Si IL and decrease of gate current, Jg is saturated after Si IL of 2 nm. It was also observed that when Si IL is thick enough to restrict Ge outdiffusion, increase of Jg is not due to the temperature-induced Ge outdiffusion but due to the partial crystallization of HfO2 at higher annealing temperature.

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U2 - 10.1016/j.mseb.2008.06.031

DO - 10.1016/j.mseb.2008.06.031

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SN - 0921-5107

VL - 154-155

SP - 102

EP - 105

JO - Materials Science and Engineering B: Solid-State Materials for Advanced Technology

JF - Materials Science and Engineering B: Solid-State Materials for Advanced Technology

IS - 1-3

ER -

Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate

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