Effect of Si capping layer on the interface quality and NBTI of high mobility channel Ge-on-Si pMOSFETs

Ook Sang Yoo, Jungwoo Oh, Kyung Seok Min, Chang Yong Kang, B. H. Lee, Kyong Taek Lee, Min Ki Na, Hyuk Min Kwon, P. Majhi, H. H. Tseng, Raj Jammy, J. S. Wang, Hi Deok Lee

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

The effects of a Si capping layer on the device characteristics and negative bias temperature instability (NBTI) reliability were investigated for Ge-on-Si pMOSFETs. A Ge pMOSFET with a Si cap shows a lower subthreshold slope (SS), higher transconductance (Gm) and enhanced drive current. In addition, lower threshold voltage shift and Gm,max degradation are observed during NBTI stress. The primary reason for these characteristics is attributed to the improved interface quality at the high-k dielectric/substrate interface. Charge pumping was used to verify the presence of lower density of states in Ge pMOSFETs with a Si cap.

Original languageEnglish
Pages (from-to)259-262
Number of pages4
JournalMicroelectronic Engineering
Volume86
Issue number3
DOIs
Publication statusPublished - 2009 Mar

Bibliographical note

Funding Information:
This work was supported in part by the global internship Program of Korea Research Foundation (KRF).

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering

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