ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM

Hayoung Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)


Advances in the density and capacity of dynamic random access memories (DRAMs) have resulted in emerging reliability issues. The error correction code (ECC) is widely used as a promising technique to improve the reliability of high-density memories. For this reason, many studies on ECC have been conducted to address the increased cell failure rates. However, conventional ECCs have shown limited achievements owing to area, latency, and power overheads. This study proposes ECC architecture reusing content-addressable memories (CAMs) for obtaining high reliability in DRAM, which can be called ECMO. The proposed architecture reuses CAMs in built-in self-repair, which can be used to repair memory hard faults during manufacturing as data storage to replace error data words. This achieves high reliability along with an additional 9155 h DRAM lifetime. Nevertheless, it can be implemented with a 3.04% area overhead due to the reuse of CAMs. Moreover, only 0.21 ns is added to the critical path. Furthermore, the power overhead is 0.1% compared to the total power consumption of DDR3 and DDR4.

Original languageEnglish
Pages (from-to)781-793
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number6
Publication statusPublished - 2022 Jun 1

Bibliographical note

Publisher Copyright:
© 1993-2012 IEEE.

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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